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authorMike Frysinger <vapier@gentoo.org>2021-12-06 02:16:25 -0500
committerMike Frysinger <vapier@gentoo.org>2022-01-06 01:17:38 -0500
commit2875d098a59a72d3dd942d89901318aed6331cf6 (patch)
tree8df81d5386280597d2b398a7474330682cbbebf9 /sim
parent1e1e987aed7d7454d42a1ea77c60a24f3d718ef0 (diff)
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sim: cris: migrate to standard uintXX_t types
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
Diffstat (limited to 'sim')
-rw-r--r--sim/cris/cris-sim.h22
-rw-r--r--sim/cris/cris-tmpl.c2
-rw-r--r--sim/cris/crisv10f.c2
-rw-r--r--sim/cris/crisv32f.c6
-rw-r--r--sim/cris/dv-cris.c24
-rw-r--r--sim/cris/dv-rv.c102
-rw-r--r--sim/cris/traps.c2
7 files changed, 80 insertions, 80 deletions
diff --git a/sim/cris/cris-sim.h b/sim/cris/cris-sim.h
index 28ef4ff..c2801c9 100644
--- a/sim/cris/cris-sim.h
+++ b/sim/cris/cris-sim.h
@@ -34,22 +34,22 @@ typedef struct {
/* Static cycle count for all insns executed so far, including
non-context-specific stall cycles, for example when adding to PC. */
- unsigned64 basic_cycle_count;
+ uint64_t basic_cycle_count;
/* Stall cycles for unaligned access of memory operands. FIXME:
Should or should not include unaligned [PC+] operands? */
- unsigned64 unaligned_mem_dword_count;
+ uint64_t unaligned_mem_dword_count;
/* Context-specific stall cycles. */
- unsigned64 memsrc_stall_count;
- unsigned64 memraw_stall_count;
- unsigned64 movemsrc_stall_count;
- unsigned64 movemaddr_stall_count;
- unsigned64 movemdst_stall_count;
- unsigned64 mulsrc_stall_count;
- unsigned64 jumpsrc_stall_count;
- unsigned64 branch_stall_count;
- unsigned64 jumptarget_stall_count;
+ uint64_t memsrc_stall_count;
+ uint64_t memraw_stall_count;
+ uint64_t movemsrc_stall_count;
+ uint64_t movemaddr_stall_count;
+ uint64_t movemdst_stall_count;
+ uint64_t mulsrc_stall_count;
+ uint64_t jumpsrc_stall_count;
+ uint64_t branch_stall_count;
+ uint64_t jumptarget_stall_count;
/* What kind of target-specific trace to perform. */
int flags;
diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c
index 94a60d9..9f0c06e 100644
--- a/sim/cris/cris-tmpl.c
+++ b/sim/cris/cris-tmpl.c
@@ -123,7 +123,7 @@ MY (f_model_insn_before) (SIM_CPU *current_cpu, int first_p ATTRIBUTE_UNUSED)
{
int i;
char flags[7];
- unsigned64 cycle_count;
+ uint64_t cycle_count;
SIM_DESC sd = CPU_STATE (current_cpu);
diff --git a/sim/cris/crisv10f.c b/sim/cris/crisv10f.c
index 8478379..afb203d 100644
--- a/sim/cris/crisv10f.c
+++ b/sim/cris/crisv10f.c
@@ -60,7 +60,7 @@ MY (deliver_interrupt) (SIM_CPU *current_cpu,
unsigned char entryaddr_le[4];
int was_user;
SIM_DESC sd = CPU_STATE (current_cpu);
- unsigned32 entryaddr;
+ uint32_t entryaddr;
/* We haven't implemented other interrupt-types yet. */
if (type != CRIS_INT_INT)
diff --git a/sim/cris/crisv32f.c b/sim/cris/crisv32f.c
index 3b01f08..0022626 100644
--- a/sim/cris/crisv32f.c
+++ b/sim/cris/crisv32f.c
@@ -565,11 +565,11 @@ MY (deliver_interrupt) (SIM_CPU *current_cpu,
enum cris_interrupt_type type,
unsigned int vec)
{
- unsigned32 old_ccs, shifted_ccs, new_ccs;
+ uint32_t old_ccs, shifted_ccs, new_ccs;
unsigned char entryaddr_le[4];
int was_user;
SIM_DESC sd = CPU_STATE (current_cpu);
- unsigned32 entryaddr;
+ uint32_t entryaddr;
/* We haven't implemented other interrupt-types yet. */
if (type != CRIS_INT_INT)
@@ -585,7 +585,7 @@ MY (deliver_interrupt) (SIM_CPU *current_cpu,
/* The M bit is handled by code below and the M bit setter function, but
we need to preserve the Q bit. */
- new_ccs = shifted_ccs | (old_ccs & (unsigned32) 0x80000000UL);
+ new_ccs = shifted_ccs | (old_ccs & (uint32_t) 0x80000000UL);
was_user = GET_H_UBIT_V32 ();
/* We need to force kernel mode since the setter method doesn't allow
diff --git a/sim/cris/dv-cris.c b/sim/cris/dv-cris.c
index 472af0e..1143465 100644
--- a/sim/cris/dv-cris.c
+++ b/sim/cris/dv-cris.c
@@ -88,7 +88,7 @@ static const struct hw_port_descriptor cris_ports[] =
struct cris_vec_tr
{
- unsigned32 portval, vec;
+ uint32_t portval, vec;
};
enum cris_multiple_ints
@@ -101,10 +101,10 @@ enum cris_multiple_ints
struct cris_hw
{
struct hw_event *pending_handler;
- unsigned32 pending_vector;
+ uint32_t pending_vector;
struct cris_vec_tr *int_to_vec;
enum cris_multiple_ints multi_int_action;
- unsigned32 multiple_int_vector;
+ uint32_t multiple_int_vector;
};
/* An event function, calling the actual CPU-model-specific
@@ -136,9 +136,9 @@ deliver_cris_interrupt (struct hw *me, void *data)
time we get here, until a new time is seen (supposedly unstuck
re-delivery). (Fixing in SIM/GDB source will hopefully then
also be easier, having a tangible test-case.) */
- static signed64 last_events_time = 0;
- static signed64 delta = 1;
- signed64 this_events_time = hw_event_queue_time (me);
+ static int64_t last_events_time = 0;
+ static int64_t delta = 1;
+ int64_t this_events_time = hw_event_queue_time (me);
if (this_events_time == last_events_time)
delta++;
@@ -164,7 +164,7 @@ cris_port_event (struct hw *me,
int intparam)
{
struct cris_hw *crishw = hw_data (me);
- unsigned32 vec;
+ uint32_t vec;
/* A few placeholders; only the INT port is implemented. */
switch (my_port)
@@ -194,7 +194,7 @@ cris_port_event (struct hw *me,
vec = crishw->int_to_vec[i].vec;
}
else
- vec = (unsigned32) intparam;
+ vec = (uint32_t) intparam;
if (crishw->pending_vector != 0)
{
@@ -245,8 +245,8 @@ cris_finish (struct hw *me)
vec_for_int = hw_find_property (me, "vec-for-int");
if (vec_for_int != NULL)
{
- unsigned32 vecsize;
- unsigned32 i;
+ uint32_t vecsize;
+ uint32_t i;
if (hw_property_type (vec_for_int) != array_property)
hw_abort (me, "property \"vec-for-int\" has the wrong type");
@@ -272,8 +272,8 @@ cris_finish (struct hw *me)
|| vec_sc < 0)
hw_abort (me, "no valid vector translation pair %u", i);
- crishw->int_to_vec[i].portval = (unsigned32) portval_sc;
- crishw->int_to_vec[i].vec = (unsigned32) vec_sc;
+ crishw->int_to_vec[i].portval = (uint32_t) portval_sc;
+ crishw->int_to_vec[i].vec = (uint32_t) vec_sc;
}
crishw->int_to_vec[i].portval = 0;
diff --git a/sim/cris/dv-rv.c b/sim/cris/dv-rv.c
index 5d8c06b..42ef9b1 100644
--- a/sim/cris/dv-rv.c
+++ b/sim/cris/dv-rv.c
@@ -293,43 +293,43 @@ enum rv_command {
typedef struct _hw_rv_device
{
/* Mapping of remote interrupt bit-numbers to local ones. */
- unsigned32 remote_to_local_int[32];
+ uint32_t remote_to_local_int[32];
/* When multiple bits are set, a non-zero value here indicates that
this value should be used instead. */
- unsigned32 intmultiple;
+ uint32_t intmultiple;
/* Local address of registers. */
- unsigned32 reg_address;
+ uint32_t reg_address;
/* Size of register bank in bytes. */
- unsigned32 reg_size;
+ uint32_t reg_size;
/* Remote address of registers. */
- unsigned32 remote_reg_address;
+ uint32_t remote_reg_address;
/* Local address of DMA:able memory. */
- unsigned32 mem_address;
+ uint32_t mem_address;
/* Size of DMA:able memory in bytes. */
- unsigned32 mem_size;
+ uint32_t mem_size;
/* Bitmask for valid DMA request size. */
- unsigned32 mem_burst_mask;
+ uint32_t mem_burst_mask;
/* Remote address of DMA:able memory. */
- unsigned32 remote_mem_address;
+ uint32_t remote_mem_address;
/* (Local) address of mbox; where to put a pointer to the mbox to be
sent. */
- unsigned32 mbox_address;
+ uint32_t mbox_address;
/* Probably not 127.0.0.1:10000. */
const char *host;
int port;
/* If non-NULL, points to memory to use instead of connection. */
- unsigned8 *dummy;
+ uint8_t *dummy;
/* File descriptor for the socket. Set to -1 when error. Only one
of dummy and this is active. */
@@ -341,18 +341,18 @@ typedef struct _hw_rv_device
/* This, plus latency because the CPU might not be checking until a
CTI insn (usually a branch or a jump) is the interval in cycles
between the rv is polled for e.g. DMA requests. */
- unsigned32 max_tick_poll_interval;
+ uint32_t max_tick_poll_interval;
/* Running counter for exponential backoff up to
max_tick_poll_interval to avoid polling the connection
unnecessarily often. Set to 1 when rv activity (read/write
register, DMA request) is detected. */
- unsigned32 next_period;
+ uint32_t next_period;
/* This is the interval in wall-clock seconds between watchdog
packets are sent to the remote side. Zero means no watchdog
packets. */
- unsigned32 watchdog_interval;
+ uint32_t watchdog_interval;
/* Last time we sent a watchdog packet. */
struct timeval last_wdog_time;
@@ -384,7 +384,7 @@ hw_rv_write (struct hw *me,
unsigned int len)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned8 *bufp = buf;
+ uint8_t *bufp = buf;
/* If we don't have a valid fd here, it's because we got an error
initially, and we suppressed that error. */
@@ -414,7 +414,7 @@ hw_rv_read (struct hw *me,
unsigned int len)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned8 *bufp = buf;
+ uint8_t *bufp = buf;
while (len > 0)
{
@@ -446,8 +446,8 @@ hw_rv_send (struct hw *me,
unsigned int len_noheader)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned8 buf[32+3];
- unsigned8 *bufp;
+ uint8_t buf[32+3];
+ uint8_t *bufp;
unsigned int len = len_noheader + 3;
int ret;
@@ -478,12 +478,12 @@ hw_rv_read_mem (struct hw *me, unsigned int len)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
/* If you change this size, please adjust the mem2 testcase. */
- unsigned8 buf[32+8];
- unsigned8 *bufp = buf;
- unsigned32 leaddr;
- unsigned32 addr;
- unsigned32 lelen;
- unsigned32 i;
+ uint8_t buf[32+8];
+ uint8_t *bufp = buf;
+ uint32_t leaddr;
+ uint32_t addr;
+ uint32_t lelen;
+ uint32_t i;
if (len != 8)
hw_abort (me, "expected DMA read request len 8+3, got %d+3", len);
@@ -532,13 +532,13 @@ hw_rv_write_mem (struct hw *me, unsigned int plen)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
/* If you change this size, please adjust the mem2 testcase. */
- unsigned8 buf[32+8];
- unsigned8 *bufp = buf;
- unsigned32 leaddr;
- unsigned32 addr;
- unsigned32 lelen;
- unsigned32 len;
- unsigned32 i;
+ uint8_t buf[32+8];
+ uint8_t *bufp = buf;
+ uint32_t leaddr;
+ uint32_t addr;
+ uint32_t lelen;
+ uint32_t len;
+ uint32_t i;
hw_rv_read (me, &leaddr, 4);
hw_rv_read (me, &lelen, 4);
@@ -582,9 +582,9 @@ static void
hw_rv_irq (struct hw *me, unsigned int len)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned32 intbitsle;
- unsigned32 intbits_ext;
- unsigned32 intval = 0;
+ uint32_t intbitsle;
+ uint32_t intbits_ext;
+ uint32_t intval = 0;
int i;
if (len != 4)
@@ -609,11 +609,11 @@ hw_rv_irq (struct hw *me, unsigned int len)
static void
hw_rv_handle_incoming (struct hw *me,
int expected_type,
- unsigned8 *buf,
+ uint8_t *buf,
unsigned int *return_len)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned8 cbuf[32];
+ uint8_t cbuf[32];
unsigned int len;
unsigned int cmd;
@@ -765,7 +765,7 @@ static void
do_poll_event (struct hw *me, void *data)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned32 new_period;
+ uint32_t new_period;
if (rv->dummy != NULL)
return;
@@ -900,8 +900,8 @@ hw_rv_reg_read (struct hw *me,
unsigned int nr_bytes)
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned8 addr_data[8] = "";
- unsigned32 a_l = H2LE_4 (addr - rv->reg_address + rv->remote_reg_address);
+ uint8_t addr_data[8] = "";
+ uint32_t a_l = H2LE_4 (addr - rv->reg_address + rv->remote_reg_address);
unsigned int len = 8;
if (nr_bytes != 4)
@@ -937,10 +937,10 @@ hw_rv_reg_read (struct hw *me,
static void
hw_rv_mbox (struct hw *me, unsigned_word address)
{
- unsigned8 buf[256+3];
+ uint8_t buf[256+3];
unsigned int cmd;
unsigned int rlen;
- unsigned32 i;
+ uint32_t i;
unsigned int len
= hw_dma_read_buffer (me, buf, 0, address, 3);
@@ -1002,8 +1002,8 @@ hw_rv_reg_write (struct hw *me,
{
hw_rv_device *rv = (hw_rv_device *) hw_data (me);
- unsigned8 addr_data[8] = "";
- unsigned32 a_l = H2LE_4 (addr - rv->reg_address + rv->remote_reg_address);
+ uint8_t addr_data[8] = "";
+ uint32_t a_l = H2LE_4 (addr - rv->reg_address + rv->remote_reg_address);
unsigned int len = 8;
if (nr_bytes != 4)
@@ -1014,7 +1014,7 @@ hw_rv_reg_write (struct hw *me,
if (addr == rv->mbox_address)
{
- unsigned32 mbox_addr_le;
+ uint32_t mbox_addr_le;
if (rv->dummy != NULL)
hw_abort (me, "mbox not supported for a dummy instance");
memcpy (&mbox_addr_le, source, 4);
@@ -1123,15 +1123,15 @@ hw_rv_finish (struct hw *me)
if (hw_property_type (dummy_prop) == integer_property)
{
- unsigned32 dummyfill = hw_find_integer_property (me, "dummy");
- unsigned8 *dummymem = hw_malloc (me, rv->reg_size);
+ uint32_t dummyfill = hw_find_integer_property (me, "dummy");
+ uint8_t *dummymem = hw_malloc (me, rv->reg_size);
memset (dummymem, dummyfill, rv->reg_size);
rv->dummy = dummymem;
}
else
{
const char *dummyarg = hw_find_string_property (me, "dummy");
- unsigned8 *dummymem = hw_malloc (me, rv->reg_size);
+ uint8_t *dummymem = hw_malloc (me, rv->reg_size);
FILE *f = fopen (dummyarg, "rb");
if (f == NULL)
@@ -1153,10 +1153,10 @@ hw_rv_finish (struct hw *me)
signed_cell attach_address_sc
= hw_find_integer_property (me, "mbox");
- rv->mbox_address = (unsigned32) attach_address_sc;
+ rv->mbox_address = (uint32_t) attach_address_sc;
hw_attach_address (hw_parent (me),
0,
- 0, (unsigned32) attach_address_sc, 4, me);
+ 0, (uint32_t) attach_address_sc, 4, me);
}
else
hw_abort (me, "property \"mbox\" has the wrong type");
@@ -1176,8 +1176,8 @@ hw_rv_finish (struct hw *me)
&& hw_find_integer_array_property (me, "mem", 1, &attach_size_sc))
{
/* Unfortunate choice of types forces us to dance around a bit. */
- rv->mem_address = (unsigned32) attach_address_sc;
- rv->mem_size = (unsigned32) attach_size_sc;
+ rv->mem_address = (uint32_t) attach_address_sc;
+ rv->mem_size = (uint32_t) attach_size_sc;
if ((attach_address_sc & 3) != 0)
hw_abort (me, "memory block must be 4 byte aligned");
}
diff --git a/sim/cris/traps.c b/sim/cris/traps.c
index e17d405..e92fa1a 100644
--- a/sim/cris/traps.c
+++ b/sim/cris/traps.c
@@ -803,7 +803,7 @@ dump_statistics (SIM_CPU *current_cpu)
SIM_DESC sd = CPU_STATE (current_cpu);
CRIS_MISC_PROFILE *profp
= CPU_CRIS_MISC_PROFILE (current_cpu);
- unsigned64 total = profp->basic_cycle_count;
+ uint64_t total = profp->basic_cycle_count;
/* Historically, these messages have gone to stderr, so we'll keep it
that way. It's also easier to then tell it from normal program