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authorDaniel Jacobowitz <drow@false.org>2005-06-17 03:13:07 +0000
committerDaniel Jacobowitz <drow@false.org>2005-06-17 03:13:07 +0000
commit195b8a572e7c45d991906fd5b4e9fbbf5567abfd (patch)
treebac5f406171caff2b0cc6d62b4b90459f6f6b93e /sim
parent61e264e76ff7593888235ec52bee559e80dcdbfe (diff)
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* gencode.c (tab): Avoid lvalue casts. Suggested by
Ralf Corsepius <ralf.corsepius@rtems.org>.
Diffstat (limited to 'sim')
-rw-r--r--sim/sh/ChangeLog5
-rw-r--r--sim/sh/gencode.c4
2 files changed, 8 insertions, 1 deletions
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index 8a6d6ff..5d6a146 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,8 @@
+2005-06-16 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * gencode.c (tab): Avoid lvalue casts. Suggested by
+ Ralf Corsepius <ralf.corsepius@rtems.org>.
+
2005-04-12 Jonathan Larmour <jifl@eCosCentric.com>
* gencode.c (tab): Avoid inserting code before variables all declared.
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index c3c8c05..e86bd29 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -215,7 +215,9 @@ op tab[] =
"RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
"if (R0 == 0)",
" R[n] = 0xffffffff;",
- "else (unsigned int) R[n] = (unsigned int) R[n] / (unsigned int) R0;",
+ "/* FIXME: The result may be implementation-defined if it is outside */",
+ "/* the range of signed int (i.e. if R[n] was negative and R0 == 1). */",
+ "else R[n] = R[n] / (unsigned int) R0;",
"L (n);",
},
{ "n", "0n", "mulr R0,<REG_N>", "0100nnnn10000000",