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| author | Kevin Buettner <kevinb@redhat.com> | 2010-09-24 05:18:23 +0000 |
|---|---|---|
| committer | Kevin Buettner <kevinb@redhat.com> | 2010-09-24 05:18:23 +0000 |
| commit | e537977262c187604a7bf352617df6524330fb90 (patch) | |
| tree | 32da1853ffedede5c5bd54c72a9bcf34a84af457 /sim/rx/rx.c | |
| parent | 3c7be86bc0ecd073263e7f1a8cbbdab937f511b0 (diff) | |
| download | gdb-e537977262c187604a7bf352617df6524330fb90.zip gdb-e537977262c187604a7bf352617df6524330fb90.tar.gz gdb-e537977262c187604a7bf352617df6524330fb90.tar.bz2 | |
* rx.c (decode_opcode): Add cycle information for RXO_smovu.
Diffstat (limited to 'sim/rx/rx.c')
| -rw-r--r-- | sim/rx/rx.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sim/rx/rx.c b/sim/rx/rx.c index 19b896b..17f5b46 100644 --- a/sim/rx/rx.c +++ b/sim/rx/rx.c @@ -1818,6 +1818,9 @@ decode_opcode () break; case RXO_smovu: +#ifdef CYCLE_ACCURATE + tx = regs.r[3]; +#endif while (regs.r[3] != 0) { uma = mem_get_qi (regs.r[2] ++); @@ -1826,6 +1829,7 @@ decode_opcode () if (uma == 0) break; } + cycles (2 + 3 * (int)(tx / 4) + 3 * (tx % 4)); break; case RXO_shar: /* d = ma >> mb */ |