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authorDJ Delorie <dj@redhat.com>2015-04-30 15:25:49 -0400
committerDJ Delorie <dj@redhat.com>2015-04-30 15:25:49 -0400
commit0952813b0b27abe7f53a8048c0218883412e54cd (patch)
tree5407096ab234c7abec96a530789cd5bdb7069077 /sim/rl78/load.c
parentb49f93f6995a5d23c752db103902314d4e23f761 (diff)
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Make RL78 disassembler and simulator respect ISA for mul/div
[gas] * config/rl78-defs.h (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. * config/rl78-parse.y (ISA_G10): New. (ISA_G13): New. (ISA_G14): New. (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. * config/tc-rl78.c (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. [gdb] * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to rl78_decode_opcode [include] * dis-asm.h (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. * opcode/rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. [opcodes] * disassemble.c (disassembler): Choose suitable disassembler based on E_ABI. * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use it to decode mul/div insns. * rl78-decode.c: Regenerate. * rl78-dis.c (print_insn_rl78): Rename to... (print_insn_rl78_common): ...this, take ISA parameter. (print_insn_rl78): New. (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. [sim] * rl78/cpu.c (g14_multiply): New. * rl78/cpu.h (g14_multiply): New. * rl78/load.c (rl78_load): Decode ISA completely. * rl78/main.c (main): Expand -M to include other ISAs. * rl78/rl78.c (decode_opcode): Decode based on ISA. * rl78/trace.c (rl78_disasm_fn): New. (sim_disasm_init): Reset it. (sim_disasm_one): Get correct disassembler for ISA.
Diffstat (limited to 'sim/rl78/load.c')
-rw-r--r--sim/rl78/load.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/sim/rl78/load.c b/sim/rl78/load.c
index 66d00d3..ef559a5 100644
--- a/sim/rl78/load.c
+++ b/sim/rl78/load.c
@@ -92,13 +92,26 @@ rl78_load (bfd *prog, host_callback *callbacks, const char * const simname)
return;
}
- rl78_g10_mode = 0;
switch (elf_elfheader (prog)->e_flags & E_FLAG_RL78_CPU_MASK)
{
- case E_FLAG_RL78_G10: rl78_g10_mode = 1; break;
- case E_FLAG_RL78_G13: g13_multiply = 1; break;
+ case E_FLAG_RL78_G10:
+ rl78_g10_mode = 1;
+ g13_multiply = 0;
+ g14_multiply = 0;
+ mem_set_mirror (0, 0xf8000, 4096);
+ break;
+ case E_FLAG_RL78_G13:
+ rl78_g10_mode = 0;
+ g13_multiply = 1;
+ g14_multiply = 0;
+ break;
case E_FLAG_RL78_G14:
+ rl78_g10_mode = 0;
+ g13_multiply = 0;
+ g14_multiply = 1;
+ break;
default:
+ /* Keep whatever was manually specified. */
break;
}