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| author | Mike Frysinger <vapier@gentoo.org> | 2023-12-24 03:53:03 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2023-12-24 03:56:00 -0500 |
| commit | fed277fe1516127a0414eeda0b17a8bb6b318baf (patch) | |
| tree | 993b693d57dee10c68b2a31eac98e53c1c54b1f3 /sim/or1k | |
| parent | 1bdba1b7730fbdb848b50ae05f8ae4a0b693a0e3 (diff) | |
| download | gdb-fed277fe1516127a0414eeda0b17a8bb6b318baf.zip gdb-fed277fe1516127a0414eeda0b17a8bb6b318baf.tar.gz gdb-fed277fe1516127a0414eeda0b17a8bb6b318baf.tar.bz2 | |
sim: sh: fix plds Dz,MACL implementation
The plds Dz,MACL insn stores the Dz bit into MACL. The current code
was storing the "res" variable into Dz and then into MACL, but not
setting "res" to anything. Delete that logic and make it match the
existing plds Dz,MACH insn.
Diffstat (limited to 'sim/or1k')
0 files changed, 0 insertions, 0 deletions