sim: mips: delete mmu stubs to move to common sim_{read,write}

The only unique thing about mip's sim_{read,write} helpers is the call to
address_translation on the incoming address.  When we look closer at that
function though, we see it's just a stub that maps physical to virtual,
and the cache/return values are hardcoded.  If we delete this function,
we can then collapse all the callers and drop the custom sim_{read,write}
logic entirely.

Some day we might want to add MMU support, but when we do, we'll want to
have the common layers handle things so all targets benefit.

1 files changed, 19 insertions, 0 deletions

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 46fd20c..eb076e4 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,22 @@
+2015-12-26  Mike Frysinger  <vapier@gentoo.org>
+
+	* interp.c (sim_write, sim_read): Delete.
+	(store_word): Delete call to AddressTranslation and set paddr=vaddr.
+	(load_word): Likewise.
+	* micromips.igen (cache): Likewise.
+	* mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
+	do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
+	do_store_left, do_store_right, do_load_double, do_store_double):
+	Likewise.
+	(do_pref): Delete call to AddressTranslation and stub out Prefetch.
+	(do_prefx): Likewise.
+	* sim-main.c (address_translation, prefetch): Delete.
+	(ifetch32, ifetch16): Delete call to AddressTranslation and set
+	paddr=vaddr.
+	* sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
+	address_translation, AddressTranslation, prefetch, Prefetch): Delete.
+	(LoadMemory, StoreMemory): Delete CCA arg.
+
 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 
 	* configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.