sim: m68hc11: migrate to standard uintXX_t types

This old port setup its own uintXX types, but since we require C11
now, we can assume the standard uintXX_t types exist and use them.

Also migrate off the sim-specific unsignedXX types.

1 files changed, 70 insertions, 78 deletions

diff --git a/sim/m68hc11/sim-main.h b/sim/m68hc11/sim-main.h
index 3c00f75..e667c33 100644
--- a/sim/m68hc11/sim-main.h
+++ b/sim/m68hc11/sim-main.h
@@ -32,14 +32,6 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 #include "sim-signal.h"
 #include "sim-types.h"
 
-typedef unsigned8 uint8;
-typedef unsigned16 uint16;
-typedef signed16 int16;
-typedef unsigned32 uint32;
-typedef signed32 int32;
-typedef unsigned64 uint64;
-typedef signed64 int64;
-
 struct _sim_cpu;
 
 #include "interrupts.h"
@@ -98,9 +90,9 @@ typedef struct io_reg_desc io_reg_desc;
 extern void print_io_reg_desc (SIM_DESC sd, io_reg_desc *desc, int val,
 			       int mode);
 extern void print_io_byte (SIM_DESC sd, const char *name,
-			   io_reg_desc *desc, uint8 val, uint16 addr);
+			   io_reg_desc *desc, uint8_t val, uint16_t addr);
 extern void print_io_word (SIM_DESC sd, const char *name,
-			   io_reg_desc *desc, uint16 val, uint16 addr);
+			   io_reg_desc *desc, uint16_t val, uint16_t addr);
 
 
 /* List of special 68HC11&68HC12 instructions that are not handled by the
@@ -161,11 +153,11 @@ struct _sim_cpu {
   /* CPU absolute cycle time.  The cycle time is updated after
      each instruction, by the number of cycles taken by the instruction.
      It is cleared only when reset occurs.  */
-  signed64              cpu_absolute_cycle;
+  int64_t              cpu_absolute_cycle;
 
   /* Number of cycles to increment after the current instruction.
      This is also the number of ticks for the generic event scheduler.  */
-  uint8                 cpu_current_cycle;
+  uint8_t                 cpu_current_cycle;
   int                   cpu_emul_syscall;
   int                   cpu_is_initialized;
   int                   cpu_running;
@@ -182,7 +174,7 @@ struct _sim_cpu {
   /* The starting address specified in ELF header.  */
   int                   cpu_elf_start;
   
-  uint16                cpu_insn_pc;
+  uint16_t                cpu_insn_pc;
 
   /* CPU frequency.  This is the quartz frequency.  It is divided by 4 to
      get the cycle time.  This is used for the timer rate and for the baud
@@ -197,15 +189,15 @@ struct _sim_cpu {
   enum cpu_type         cpu_type;
   
   /* Initial value of the CONFIG register.  */
-  uint8                 cpu_config;
-  uint8                 cpu_use_local_config;
+  uint8_t                 cpu_config;
+  uint8_t                 cpu_use_local_config;
   
-  uint8                 ios[MAX_PORTS];
+  uint8_t                 ios[MAX_PORTS];
 
   /* Memory bank parameters which describe how the memory bank window
      is mapped in memory and how to convert it in virtual address.  */
-  uint16                bank_start;
-  uint16                bank_end;
+  uint16_t                bank_start;
+  uint16_t                bank_end;
   address_word          bank_virtual;
   unsigned              bank_shift;
   
@@ -219,14 +211,14 @@ struct _sim_cpu {
 /* Returns the cpu absolute cycle time (A virtual counter incremented
    at each 68HC11 E clock).  */
 #define cpu_current_cycle(cpu)    ((cpu)->cpu_absolute_cycle)
-#define cpu_add_cycles(cpu, T)    ((cpu)->cpu_current_cycle += (signed64) (T))
+#define cpu_add_cycles(cpu, T)    ((cpu)->cpu_current_cycle += (int64_t) (T))
 #define cpu_is_running(cpu)       ((cpu)->cpu_running)
 
 /* Get the IO/RAM base addresses depending on the M6811_INIT register.  */
 #define cpu_get_io_base(cpu) \
-  (((uint16)(((cpu)->ios[M6811_INIT]) & 0x0F)) << 12)
+  (((uint16_t)(((cpu)->ios[M6811_INIT]) & 0x0F)) << 12)
 #define cpu_get_reg_base(cpu) \
-  (((uint16)(((cpu)->ios[M6811_INIT]) & 0xF0)) << 8)
+  (((uint16_t)(((cpu)->ios[M6811_INIT]) & 0xF0)) << 8)
 
 /* Returns the different CPU registers.  */
 #define cpu_get_ccr(cpu)          ((cpu)->cpu_regs.ccr)
@@ -288,7 +280,7 @@ struct _sim_cpu {
 
 extern void cpu_memory_exception (sim_cpu *cpu,
                                   SIM_SIGNAL excep,
-                                  uint16 addr,
+                                  uint16_t addr,
                                   const char *message);
 
 STATIC_INLINE UNUSED address_word
@@ -302,10 +294,10 @@ phys_to_virt (sim_cpu *cpu, address_word addr)
     return (address_word) (addr);
 }
 
-STATIC_INLINE UNUSED uint8
-memory_read8 (sim_cpu *cpu, uint16 addr)
+STATIC_INLINE UNUSED uint8_t
+memory_read8 (sim_cpu *cpu, uint16_t addr)
 {
-  uint8 val;
+  uint8_t val;
 
   if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
     {
@@ -316,7 +308,7 @@ memory_read8 (sim_cpu *cpu, uint16 addr)
 }
 
 STATIC_INLINE UNUSED void
-memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
+memory_write8 (sim_cpu *cpu, uint16_t addr, uint8_t val)
 {
   if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
     {
@@ -325,23 +317,23 @@ memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
     }
 }
 
-STATIC_INLINE UNUSED uint16
-memory_read16 (sim_cpu *cpu, uint16 addr)
+STATIC_INLINE UNUSED uint16_t
+memory_read16 (sim_cpu *cpu, uint16_t addr)
 {
-  uint8 b[2];
+  uint8_t b[2];
 
   if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, b, addr, 2) != 2)
     {
       cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
                             "Read error");
     }
-  return (((uint16) (b[0])) << 8) | ((uint16) b[1]);
+  return (((uint16_t) (b[0])) << 8) | ((uint16_t) b[1]);
 }
 
 STATIC_INLINE UNUSED void
-memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
+memory_write16 (sim_cpu *cpu, uint16_t addr, uint16_t val)
 {
-  uint8 b[2];
+  uint8_t b[2];
 
   b[0] = val >> 8;
   b[1] = val;
@@ -352,10 +344,10 @@ memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
     }
 }
 extern void
-cpu_ccr_update_tst8 (sim_cpu *cpu, uint8 val);
+cpu_ccr_update_tst8 (sim_cpu *cpu, uint8_t val);
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_tst16 (sim_cpu *cpu, uint16 val)
+cpu_ccr_update_tst16 (sim_cpu *cpu, uint16_t val)
 {
   cpu_set_ccr_V (cpu, 0);
   cpu_set_ccr_N (cpu, val & 0x8000 ? 1 : 0);
@@ -363,7 +355,7 @@ cpu_ccr_update_tst16 (sim_cpu *cpu, uint16 val)
 }
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_shift8 (sim_cpu *cpu, uint8 val)
+cpu_ccr_update_shift8 (sim_cpu *cpu, uint8_t val)
 {
   cpu_set_ccr_N (cpu, val & 0x80 ? 1 : 0);
   cpu_set_ccr_Z (cpu, val == 0 ? 1 : 0);
@@ -371,7 +363,7 @@ cpu_ccr_update_shift8 (sim_cpu *cpu, uint8 val)
 }
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_shift16 (sim_cpu *cpu, uint16 val)
+cpu_ccr_update_shift16 (sim_cpu *cpu, uint16_t val)
 {
   cpu_set_ccr_N (cpu, val & 0x8000 ? 1 : 0);
   cpu_set_ccr_Z (cpu, val == 0 ? 1 : 0);
@@ -379,7 +371,7 @@ cpu_ccr_update_shift16 (sim_cpu *cpu, uint16 val)
 }
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_add8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
+cpu_ccr_update_add8 (sim_cpu *cpu, uint8_t r, uint8_t a, uint8_t b)
 {
   cpu_set_ccr_C (cpu, ((a & b) | (b & ~r) | (a & ~r)) & 0x80 ? 1 : 0);
   cpu_set_ccr_V (cpu, ((a & b & ~r) | (~a & ~b & r)) & 0x80 ? 1 : 0);
@@ -389,7 +381,7 @@ cpu_ccr_update_add8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
 
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_sub8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
+cpu_ccr_update_sub8 (sim_cpu *cpu, uint8_t r, uint8_t a, uint8_t b)
 {
   cpu_set_ccr_C (cpu, ((~a & b) | (b & r) | (~a & r)) & 0x80 ? 1 : 0);
   cpu_set_ccr_V (cpu, ((a & ~b & ~r) | (~a & b & r)) & 0x80 ? 1 : 0);
@@ -398,7 +390,7 @@ cpu_ccr_update_sub8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
 }
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_add16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
+cpu_ccr_update_add16 (sim_cpu *cpu, uint16_t r, uint16_t a, uint16_t b)
 {
   cpu_set_ccr_C (cpu, ((a & b) | (b & ~r) | (a & ~r)) & 0x8000 ? 1 : 0);
   cpu_set_ccr_V (cpu, ((a & b & ~r) | (~a & ~b & r)) & 0x8000 ? 1 : 0);
@@ -407,7 +399,7 @@ cpu_ccr_update_add16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
 }
 
 STATIC_INLINE UNUSED void
-cpu_ccr_update_sub16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
+cpu_ccr_update_sub16 (sim_cpu *cpu, uint16_t r, uint16_t a, uint16_t b)
 {
   cpu_set_ccr_C (cpu, ((~a & b) | (b & r) | (~a & r)) & 0x8000 ? 1 : 0);
   cpu_set_ccr_V (cpu, ((a & ~b & ~r) | (~a & b & r)) & 0x8000 ? 1 : 0);
@@ -417,39 +409,39 @@ cpu_ccr_update_sub16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
 
 /* Push and pop instructions for 68HC11 (next-available stack mode).  */
 STATIC_INLINE UNUSED void
-cpu_m68hc11_push_uint8 (sim_cpu *cpu, uint8 val)
+cpu_m68hc11_push_uint8 (sim_cpu *cpu, uint8_t val)
 {
-  uint16 addr = cpu->cpu_regs.sp;
+  uint16_t addr = cpu->cpu_regs.sp;
 
   memory_write8 (cpu, addr, val);
   cpu->cpu_regs.sp = addr - 1;
 }
 
 STATIC_INLINE UNUSED void
-cpu_m68hc11_push_uint16 (sim_cpu *cpu, uint16 val)
+cpu_m68hc11_push_uint16 (sim_cpu *cpu, uint16_t val)
 {
-  uint16 addr = cpu->cpu_regs.sp - 1;
+  uint16_t addr = cpu->cpu_regs.sp - 1;
 
   memory_write16 (cpu, addr, val);
   cpu->cpu_regs.sp = addr - 1;
 }
 
-STATIC_INLINE UNUSED uint8
+STATIC_INLINE UNUSED uint8_t
 cpu_m68hc11_pop_uint8 (sim_cpu *cpu)
 {
-  uint16 addr = cpu->cpu_regs.sp;
-  uint8 val;
+  uint16_t addr = cpu->cpu_regs.sp;
+  uint8_t val;
   
   val = memory_read8 (cpu, addr + 1);
   cpu->cpu_regs.sp = addr + 1;
   return val;
 }
 
-STATIC_INLINE UNUSED uint16
+STATIC_INLINE UNUSED uint16_t
 cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
 {
-  uint16 addr = cpu->cpu_regs.sp;
-  uint16 val;
+  uint16_t addr = cpu->cpu_regs.sp;
+  uint16_t val;
   
   val = memory_read16 (cpu, addr + 1);
   cpu->cpu_regs.sp = addr + 2;
@@ -458,9 +450,9 @@ cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
 
 /* Push and pop instructions for 68HC12 (last-used stack mode).  */
 STATIC_INLINE UNUSED void
-cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8 val)
+cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8_t val)
 {
-  uint16 addr = cpu->cpu_regs.sp;
+  uint16_t addr = cpu->cpu_regs.sp;
 
   addr --;
   memory_write8 (cpu, addr, val);
@@ -468,31 +460,31 @@ cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8 val)
 }
 
 STATIC_INLINE UNUSED void
-cpu_m68hc12_push_uint16 (sim_cpu *cpu, uint16 val)
+cpu_m68hc12_push_uint16 (sim_cpu *cpu, uint16_t val)
 {
-  uint16 addr = cpu->cpu_regs.sp;
+  uint16_t addr = cpu->cpu_regs.sp;
 
   addr -= 2;
   memory_write16 (cpu, addr, val);
   cpu->cpu_regs.sp = addr;
 }
 
-STATIC_INLINE UNUSED uint8
+STATIC_INLINE UNUSED uint8_t
 cpu_m68hc12_pop_uint8 (sim_cpu *cpu)
 {
-  uint16 addr = cpu->cpu_regs.sp;
-  uint8 val;
+  uint16_t addr = cpu->cpu_regs.sp;
+  uint8_t val;
   
   val = memory_read8 (cpu, addr);
   cpu->cpu_regs.sp = addr + 1;
   return val;
 }
 
-STATIC_INLINE UNUSED uint16
+STATIC_INLINE UNUSED uint16_t
 cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
 {
-  uint16 addr = cpu->cpu_regs.sp;
-  uint16 val;
+  uint16_t addr = cpu->cpu_regs.sp;
+  uint16_t val;
   
   val = memory_read16 (cpu, addr);
   cpu->cpu_regs.sp = addr + 2;
@@ -500,37 +492,37 @@ cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
 }
 
 /* Fetch a 8/16 bit value and update the PC.  */
-STATIC_INLINE UNUSED uint8
+STATIC_INLINE UNUSED uint8_t
 cpu_fetch8 (sim_cpu *cpu)
 {
-  uint16 addr = cpu->cpu_regs.pc;
-  uint8 val;
+  uint16_t addr = cpu->cpu_regs.pc;
+  uint8_t val;
   
   val = memory_read8 (cpu, addr);
   cpu->cpu_regs.pc = addr + 1;
   return val;
 }
 
-STATIC_INLINE UNUSED uint16
+STATIC_INLINE UNUSED uint16_t
 cpu_fetch16 (sim_cpu *cpu)
 {
-  uint16 addr = cpu->cpu_regs.pc;
-  uint16 val;
+  uint16_t addr = cpu->cpu_regs.pc;
+  uint16_t val;
   
   val = memory_read16 (cpu, addr);
   cpu->cpu_regs.pc = addr + 2;
   return val;
 }
 
-extern void cpu_call (sim_cpu *cpu, uint16 addr);
-extern void cpu_exg (sim_cpu *cpu, uint8 code);
+extern void cpu_call (sim_cpu *cpu, uint16_t addr);
+extern void cpu_exg (sim_cpu *cpu, uint8_t code);
 extern void cpu_dbcc (sim_cpu *cpu);
 extern void cpu_special (sim_cpu *cpu, enum M6811_Special special);
-extern void cpu_move8 (sim_cpu *cpu, uint8 op);
-extern void cpu_move16 (sim_cpu *cpu, uint8 op);
+extern void cpu_move8 (sim_cpu *cpu, uint8_t op);
+extern void cpu_move16 (sim_cpu *cpu, uint8_t op);
 
-extern uint16 cpu_fetch_relbranch (sim_cpu *cpu);
-extern uint16 cpu_fetch_relbranch16 (sim_cpu *cpu);
+extern uint16_t cpu_fetch_relbranch (sim_cpu *cpu);
+extern uint16_t cpu_fetch_relbranch16 (sim_cpu *cpu);
 extern void cpu_push_all (sim_cpu *cpu);
 extern void cpu_single_step (sim_cpu *cpu);
 
@@ -540,30 +532,30 @@ extern int cpu_initialize (SIM_DESC sd, sim_cpu *cpu);
 
 /* Returns the address of a 68HC12 indexed operand.
    Pre and post modifications are handled on the source register.  */
-extern uint16 cpu_get_indexed_operand_addr (sim_cpu *cpu, int restricted);
+extern uint16_t cpu_get_indexed_operand_addr (sim_cpu *cpu, int restricted);
 
 extern void cpu_return (sim_cpu *cpu);
-extern void cpu_set_sp (sim_cpu *cpu, uint16 val);
+extern void cpu_set_sp (sim_cpu *cpu, uint16_t val);
 extern int cpu_reset (sim_cpu *cpu);
 extern int cpu_restart (sim_cpu *cpu);
 extern void sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
-                              uint16 addr, const char *message, ...);
+                              uint16_t addr, const char *message, ...);
 extern void emul_os (int op, sim_cpu *cpu);
 extern void cpu_interp_m6811 (sim_cpu *cpu);
 extern void cpu_interp_m6812 (sim_cpu *cpu);
 
 extern int m68hc11cpu_set_oscillator (SIM_DESC sd, const char *port,
 				      double ton, double toff,
-				      signed64 repeat);
+				      int64_t repeat);
 extern int m68hc11cpu_clear_oscillator (SIM_DESC sd, const char *port);
 extern void m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
-				 unsigned addr, uint8 val);
+				 unsigned addr, uint8_t val);
 
 extern void sim_board_reset (SIM_DESC sd);
 
 #define PRINT_TIME  0x01
 #define PRINT_CYCLE 0x02
-extern const char *cycle_to_string (sim_cpu *cpu, signed64 t, int flags);
+extern const char *cycle_to_string (sim_cpu *cpu, int64_t t, int flags);
 
 #endif