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authorMike Frysinger <vapier@gentoo.org>2011-06-18 19:24:57 +0000
committerMike Frysinger <vapier@gentoo.org>2011-06-18 19:24:57 +0000
commit075a845a9281b4bdef459b6494a7db3bf666b911 (patch)
tree153cb39d0879e6148c180453892ffe7ba36f53d9 /sim/bfin
parentb02cc5b9df3085cad87f914f7616cdec809630bc (diff)
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sim: bfin: fix dsp insns IH saturation/rounding behavior
When using the IH modifier, we need to first saturate the value before rounding it, and then further saturate it a bit more. This makes the sim match the hardware behavior with these insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'sim/bfin')
-rw-r--r--sim/bfin/ChangeLog5
-rw-r--r--sim/bfin/bfin-sim.c12
2 files changed, 16 insertions, 1 deletions
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog
index aaea1e5..72bd358 100644
--- a/sim/bfin/ChangeLog
+++ b/sim/bfin/ChangeLog
@@ -1,5 +1,10 @@
2011-06-18 Robin Getz <robin.getz@analog.com>
+ * bfin-sim.c (extract_mult): When mmod is M_IH, change the order
+ from round/saturate to saturate/round/saturate.
+
+2011-06-18 Robin Getz <robin.getz@analog.com>
+
* bfin-sim.c (saturate_s40_astat): Change ">=" to ">".
(decode_macfunc): Likewise when mmod is M_IH.
diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 31136a0..5b8d601 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -1534,7 +1534,17 @@ extract_mult (SIM_CPU *cpu, bu64 res, int mmod, int MM,
case M_W32:
return saturate_s16 (rnd16 (res), overflow);
case M_IH:
- return saturate_s32 (rnd16 (res), overflow) & 0xFFFF;
+ {
+ bu32 sgn = !!(res >> 39);
+ bu16 val = rnd16 (saturate_s32 (res, overflow));
+ bu32 sgn0 = (val >> 15) & 1;
+ if (sgn == sgn0 || !val)
+ return val;
+ if (sgn)
+ return 0x8000;
+ *overflow = 1;
+ return 0x7FFF;
+ }
case M_IS:
return saturate_s16 (res, overflow);
case M_FU: