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authorMatthew Green <mrg@redhat.com>2001-04-18 16:39:37 +0000
committerMatthew Green <mrg@redhat.com>2001-04-18 16:39:37 +0000
commitc3ae2f98d01baddf23a93ea5c2311701844f8b82 (patch)
tree3e361057a3fd8c1ac85f93f87282ce628e7f09ed /sim/arm/armvirt.c
parentc9e030cfcdebafd5fb515b93e9d30a6eda273d53 (diff)
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* XScale coprocessor support.
2001-04-18 matthew green <mrg@redhat.com> * armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes. (read_cp15_reg): Make non-static. (XScale_cp15_LDC): Update for write_cp15_reg() change. (XScale_cp15_MCR): Likewise. (XScale_cp15_write_reg): Likewise. (XScale_check_memacc): New function. Check for breakpoints being activated by memory accesses. Does not support the Branch Target Buffer. (XScale_set_fsr_far): New function. Set FSR and FAR for XScale. (XScale_debug_moe): New function. Set the debug Method Of Entry, if configured. (write_cp14_reg): Reset count counter if requested. * armdefs.h (struct ARMul_State): New members `LastTime' and `CP14R0_CCD' used for the timer/counters. (ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS, ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD, ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2, ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2, ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT, ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X, ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT, ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New defines for XScale registers. (XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype. (ARMul_Emulate32, ARMul_Emulate26): Clean up function definition. (ARMul_Emulate32): Handle the clock counter and hardware instruction breakpoints. Call XScale_set_fsr_far() for software breakpoints and software interrupts. (LoadMult): Call XScale_set_fsr_far() for data aborts. (LoadSMult): Likewise. (StoreMult): Likewise. (StoreSMult): Likewise. * armemu.h (write_cp15_reg): Update prototype. * arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime. (ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13 register 0. * armvirt.c (GetWord): Call XScale_check_memacc(). (PutWord): Likewise.
Diffstat (limited to 'sim/arm/armvirt.c')
-rw-r--r--sim/arm/armvirt.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/sim/arm/armvirt.c b/sim/arm/armvirt.c
index 15f2cb6..ce1e77d 100644
--- a/sim/arm/armvirt.c
+++ b/sim/arm/armvirt.c
@@ -64,6 +64,8 @@ GetWord (ARMul_State * state, ARMword address, int check)
ARMword **pagetable;
ARMword *pageptr;
+ XScale_check_memacc (state, &address, 0);
+
page = address >> PAGEBITS;
offset = (address & OFFSETBITS) >> 2;
pagetable = (ARMword **) state->MemDataPtr;
@@ -97,6 +99,8 @@ PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
ARMword **pagetable;
ARMword *pageptr;
+ XScale_check_memacc (state, &address, 1);
+
page = address >> PAGEBITS;
offset = (address & OFFSETBITS) >> 2;
pagetable = (ARMword **) state->MemDataPtr;