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| author | Nick Clifton <nickc@redhat.com> | 2000-11-30 01:55:12 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2000-11-30 01:55:12 +0000 |
| commit | f1129fb8ff9938330168992fb23ed35e37d82d61 (patch) | |
| tree | acb0e04459f40941f698cb91b1382354c885bb72 /sim/arm/armsupp.c | |
| parent | 2a1aa0e97cefed26213a2b124e91e8d74d11a5d6 (diff) | |
| download | gdb-f1129fb8ff9938330168992fb23ed35e37d82d61.zip gdb-f1129fb8ff9938330168992fb23ed35e37d82d61.tar.gz gdb-f1129fb8ff9938330168992fb23ed35e37d82d61.tar.bz2 | |
Add support for ARM's v5TE architecture and Intel's XScale extenstions
Diffstat (limited to 'sim/arm/armsupp.c')
| -rw-r--r-- | sim/arm/armsupp.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/arm/armsupp.c b/sim/arm/armsupp.c index 27ee35b..2d0390d 100644 --- a/sim/arm/armsupp.c +++ b/sim/arm/armsupp.c @@ -302,6 +302,8 @@ ARMul_CPSRAltered (ARMul_State * state) state->Cpsr &= ~CBIT; ASSIGNV ((state->Cpsr & VBIT) != 0); state->Cpsr &= ~VBIT; + ASSIGNS ((state->Cpsr & SBIT) != 0); + state->Cpsr &= ~SBIT; #ifdef MODET ASSIGNT ((state->Cpsr & TBIT) != 0); state->Cpsr &= ~TBIT; |