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| author | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:06:30 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:06:30 +0000 |
| commit | 4ef2594f4ed0fe4191d9e791e84b6241f968fc7c (patch) | |
| tree | 545186364e09c607b926694db19d6ec5755133f7 /sim/arm/armsupp.c | |
| parent | 8de8f17e3d3138b6f1e31105823d8bb4efc66723 (diff) | |
| download | gdb-4ef2594f4ed0fe4191d9e791e84b6241f968fc7c.zip gdb-4ef2594f4ed0fe4191d9e791e84b6241f968fc7c.tar.gz gdb-4ef2594f4ed0fe4191d9e791e84b6241f968fc7c.tar.bz2 | |
* armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask. Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
Diffstat (limited to 'sim/arm/armsupp.c')
| -rw-r--r-- | sim/arm/armsupp.c | 42 |
1 files changed, 19 insertions, 23 deletions
diff --git a/sim/arm/armsupp.c b/sim/arm/armsupp.c index e63448a..6930529 100644 --- a/sim/arm/armsupp.c +++ b/sim/arm/armsupp.c @@ -193,8 +193,7 @@ ARMul_GetCPSR (ARMul_State * state) void ARMul_SetCPSR (ARMul_State * state, ARMword value) { - state->Cpsr = CPSR; - SETPSR (state->Cpsr, value); + state->Cpsr = value; ARMul_CPSRAltered (state); } @@ -207,22 +206,17 @@ void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = CPSR; - if (state->Bank == USERBANK) - { /* Only write flags in user mode */ - if (BIT (19)) - { - SETCC (state->Cpsr, rhs); - } - } - else - { /* Not a user mode */ - if (BITS (16, 19) == 9) - SETPSR (state->Cpsr, rhs); - else if (BIT (16)) - SETINTMODE (state->Cpsr, rhs); - else if (BIT (19)) - SETCC (state->Cpsr, rhs); + if (state->Bank != USERBANK) + { /* In user mode, only write flags */ + if (BIT (16)) + SETPSR_C (state->Cpsr, rhs); + if (BIT (17)) + SETPSR_X (state->Cpsr, rhs); + if (BIT (18)) + SETPSR_S (state->Cpsr, rhs); } + if (BIT (19)) + SETPSR_F (state->Cpsr, rhs); ARMul_CPSRAltered (state); } @@ -263,12 +257,14 @@ ARMul_FixSPSR (ARMul_State * state, ARMword instr, ARMword rhs) { if (BANK_CAN_ACCESS_SPSR (state->Bank)) { - if (BITS (16, 19) == 9) - SETPSR (state->Spsr[state->Bank], rhs); - else if (BIT (16)) - SETINTMODE (state->Spsr[state->Bank], rhs); - else if (BIT (19)) - SETCC (state->Spsr[state->Bank], rhs); + if (BIT (16)) + SETPSR_C (state->Spsr[state->Bank], rhs); + if (BIT (17)) + SETPSR_X (state->Spsr[state->Bank], rhs); + if (BIT (18)) + SETPSR_S (state->Spsr[state->Bank], rhs); + if (BIT (19)) + SETPSR_F (state->Spsr[state->Bank], rhs); } } |