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| author | David Daney <ddaney@avtrex.com> | 2007-10-04 21:53:06 +0000 |
|---|---|---|
| committer | David Daney <ddaney@avtrex.com> | 2007-10-04 21:53:06 +0000 |
| commit | c8ab98e0eb4ece1bde68bc45c16a2f6db8ac065f (patch) | |
| tree | 2cc5dc17c5b2152cf24b0a37baa0b9e42d4f9756 /opcodes | |
| parent | df26e7af0769e3fc15c64485eaa0792e2b22a654 (diff) | |
| download | gdb-c8ab98e0eb4ece1bde68bc45c16a2f6db8ac065f.zip gdb-c8ab98e0eb4ece1bde68bc45c16a2f6db8ac065f.tar.gz gdb-c8ab98e0eb4ece1bde68bc45c16a2f6db8ac065f.tar.bz2 | |
opcodes/
2007-10-04 David Daney <ddaney@avtrex.com>
* mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
registers.
gas/testsuite/
2007-10-04 David Daney <ddaney@avtrex.com>
* gas/mips/odd-float.d, gas/mips/odd-float.s: New test.
* gas/mips/mips.exp: Run it.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index bf1f8db..485e3ed 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2007-10-04 David Daney <ddaney@avtrex.com> + + * mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S + registers. + 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps" diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 7c2ef2b..d3bda1d 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -744,7 +744,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"fork", "d,s,t", 0x7c000008, 0xfc0007ff, TRAP|WR_d|RD_s|RD_t, 0, MT32 }, {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, 0, I3 }, {"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, 0, I3 }, -{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b|FP_D, 0, I4|I33 }, +{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b|FP_S, 0, I4|I33 }, {"lwxs", "d,t(b)", 0x70000088, 0xfc0007ff, LDD|RD_b|RD_t|WR_d, 0, SMT }, {"macc", "d,s,t", 0x00000028, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N412 }, {"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, 0, N5 }, |