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authorH.J. Lu <hjl.tools@gmail.com>2007-09-21 20:51:33 +0000
committerH.J. Lu <hjl.tools@gmail.com>2007-09-21 20:51:33 +0000
commita967d2b76a027931a5bfea1d735eef8c93b386a6 (patch)
treedb967652a269d92ab63d32a8479efbcab76366ef /opcodes
parentc99d3d7aef02c203587f22d92bf7708e11240c7e (diff)
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2007-09-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h: Adjust whitespaces.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/i386-opc.h8
2 files changed, 8 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f6dc8b8..8411939 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2007-09-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-opc.h: Adjust whitespaces.
+
2007-09-21 Dave Brolley <brolley@redhat.com>
* mep-desc.c: Regenerated.
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 0dda2a4..158e6f9 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -79,7 +79,7 @@
/* SSE4.2 support required */
#define CpuSSE4_2 (CpuSSE4_1 + 1)
/* SSE5 support required */
-#define CpuSSE5 (CpuSSE4_2 + 1)
+#define CpuSSE5 (CpuSSE4_2 + 1)
/* 64bit support available, used by -march= in assembler. */
#define CpuLM (CpuSSE5 + 1)
/* 64bit support required */
@@ -202,11 +202,11 @@ typedef union i386_cpu_flags
#define Rex64 (NoRex64 + 1)
/* deprecated fp insn, gets a warning */
#define Ugh (Rex64 + 1)
-#define Drex (Ugh + 1)
+#define Drex (Ugh + 1)
/* instruction needs DREX with multiple encodings for memory ops */
-#define Drexv (Drex + 1)
+#define Drexv (Drex + 1)
/* special DREX for comparisons */
-#define Drexc (Drexv + 1)
+#define Drexc (Drexv + 1)
/* The last bitfield in i386_opcode_modifier. */
#define Opcode_Modifier_Max Drexc