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| author | Richard Sandiford <richard.sandiford@arm.com> | 2019-07-02 11:03:22 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2019-07-02 11:03:22 +0100 |
| commit | 8127c1fbe955b1dd2cd9e49dfc8b3a3bfab3cb68 (patch) | |
| tree | 55876d4580e0de849fa080435fe8171c814e5ef4 /opcodes | |
| parent | 88cd931f4beee7b19c56571c8554cf781742a85f (diff) | |
| download | gdb-8127c1fbe955b1dd2cd9e49dfc8b3a3bfab3cb68.zip gdb-8127c1fbe955b1dd2cd9e49dfc8b3a3bfab3cb68.tar.gz gdb-8127c1fbe955b1dd2cd9e49dfc8b3a3bfab3cb68.tar.bz2 | |
[AArch64] Fix bogus MOVPRFX warning for GPR form of CPY
One of the MOVPRFX tests has:
output register of preceding `movprfx' used as input at operand 3 -- `cpy z1.d,p1/m,x1'
But X1 and Z1 are not the same register, so the instruction is
actually OK.
2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
opcodes/
* aarch64-opc.c (verify_constraints): Skip GPRs when scanning the
registers in an instruction prefixed by MOVPRFX.
gas/
* testsuite/gas/aarch64/sve-movprfx_25.s: Allow CPY Z1.D.P1/M,X1
to be prefixed by MOVPRFX.
* testsuite/gas/aarch64/sve-movprfx_25.d: Update accordingly.
* testsuite/gas/aarch64/sve-movprfx_25.l: Likewise.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 5 |
2 files changed, 5 insertions, 5 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 66a8fa3..065b1b9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2019-07-02 Richard Sandiford <richard.sandiford@arm.com> + + * aarch64-opc.c (verify_constraints): Skip GPRs when scanning the + registers in an instruction prefixed by MOVPRFX. + 2019-04-16 Sudakshina Das <sudi.das@arm.com> Backport from mainline. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 519bcb0..2d2752f 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4902,11 +4902,6 @@ verify_constraints (const struct aarch64_inst *inst, case AARCH64_OPND_Vm: case AARCH64_OPND_Sn: case AARCH64_OPND_Sm: - case AARCH64_OPND_Rn: - case AARCH64_OPND_Rm: - case AARCH64_OPND_Rn_SP: - case AARCH64_OPND_Rt_SP: - case AARCH64_OPND_Rm_SP: if (inst_op.reg.regno == blk_dest.reg.regno) { num_op_used++; |