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| author | Nick Clifton <nickc@redhat.com> | 2015-09-22 17:21:13 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2015-09-22 17:21:13 +0100 |
| commit | f04265eceb78a33e452faa8727562e96af374f39 (patch) | |
| tree | f134c9c11d36097681f843e41c465c2ee8136d24 /opcodes/rx-decode.opc | |
| parent | bc1f8cdaf4b26d1c7af34c7a33038c50fd5eabd4 (diff) | |
| download | gdb-f04265eceb78a33e452faa8727562e96af374f39.zip gdb-f04265eceb78a33e452faa8727562e96af374f39.tar.gz gdb-f04265eceb78a33e452faa8727562e96af374f39.tar.bz2 | |
Enhance the RX disassembler to detect and report bad instructions.
opcode * rx.h (enum RX_Size): Add RX_Bad_Size entry.
opcodes * rx-decode.opc (bwl): Use RX_Bad_Size.
(sbwl): Likewise.
(ubwl): Likewise. Rename to ubw.
(uBWL): Rename to uBW.
Replace all references to uBWL with uBW.
* rx-decode.c: Regenerate.
* rx-dis.c (size_names): Add entry for RX_Bad_Size.
(opsize_names): Likewise.
(print_insn_rx): Detect and report RX_Bad_Size.
Diffstat (limited to 'opcodes/rx-decode.opc')
| -rw-r--r-- | opcodes/rx-decode.opc | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc index f9b0df4..7c641fa 100644 --- a/opcodes/rx-decode.opc +++ b/opcodes/rx-decode.opc @@ -49,7 +49,7 @@ static int bwl[] = RX_Byte, RX_Word, RX_Long, - 0 /* Bogus instructions can have a size field set to 3. */ + RX_Bad_Size /* Bogus instructions can have a size field set to 3. */ }; static int sbwl[] = @@ -57,15 +57,15 @@ static int sbwl[] = RX_SByte, RX_SWord, RX_Long, - 0 /* Bogus instructions can have a size field set to 3. */ + RX_Bad_Size /* Bogus instructions can have a size field set to 3. */ }; -static int ubwl[] = +static int ubw[] = { RX_UByte, RX_UWord, - RX_Long, - 0 /* Bogus instructions can have a size field set to 3. */ + RX_Bad_Size,/* Bogus instructions can have a size field set to 2. */ + RX_Bad_Size /* Bogus instructions can have a size field set to 3. */ }; static int memex[] = @@ -131,7 +131,7 @@ static int dsp3map[] = { 8, 9, 10, 3, 4, 5, 6, 7 }; #define BWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = bwl[sz] #define sBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = sbwl[sz] -#define uBWL(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubwl[sz] +#define uBW(sz) rx->op[0].size = rx->op[1].size = rx->op[2].size = rx->size = ubw[sz] #define P(t, n) rx->op[n].size = (t!=3) ? RX_UByte : RX_Long; #define F(f) store_flags(rx, f) @@ -338,7 +338,7 @@ rx_decode_opcode (unsigned long pc AU, ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____; /** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */ - ID(movbi); uBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____; + ID(movbi); uBW(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____; /** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */ ID(mov); sBWL (sz); SR(rsrc); F_____; @@ -349,13 +349,13 @@ rx_decode_opcode (unsigned long pc AU, OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0); /** 1011 w dsp a src b dst movu%s %1, %0 */ - ID(mov); uBWL(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____; + ID(mov); uBW(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____; /** 0101 1 s ss rsrc rdst movu%s %1, %0 */ - ID(mov); uBWL(s); SD(ss, rsrc, s); DR(rdst); F_____; + ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____; /** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */ - ID(mov); uBWL (sz); DR(rdst); F_____; + ID(mov); uBW (sz); DR(rdst); F_____; OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0); /*----------------------------------------------------------------------*/ |