diff options
| author | Maciej W. Rozycki <macro@imgtec.com> | 2017-05-12 00:46:45 +0100 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2017-05-12 00:48:19 +0100 |
| commit | 99e2d67a0edd1a8feca82036feb93709fee488fa (patch) | |
| tree | 4e3f21a09ea6bb0e6775932390b1de07b2314563 /opcodes/mips-opc.c | |
| parent | f2c29a169242d0c564afb46ecaf160422b28bfbb (diff) | |
| download | gdb-99e2d67a0edd1a8feca82036feb93709fee488fa.zip gdb-99e2d67a0edd1a8feca82036feb93709fee488fa.tar.gz gdb-99e2d67a0edd1a8feca82036feb93709fee488fa.tar.bz2 | |
MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases
Following the way how descriptive SYNC mnemonics have been defined in
the architecture[1][2] mark them as aliases, so that the generic SYNC
instruction can be alternatively disassembled along with its immediate
operand, as noted in the documents referred.
References:
[1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the
Bits[10:6] of the SYNC instruction; the SType Field", p. 305
[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the
Bits[10:6] of the SYNC instruction; the SType Field", p. 481
opcodes/
* mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
"syncw", "syncws", "sync_acquire", "sync_mb", "sync_release",
"sync_rmb" and "sync_wmb" as aliases.
* micromips-opc.c (micromips_opcodes): Mark "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases.
gas/
* testsuite/gas/mips/mips32r2-sync-1.d: New test.
* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
Diffstat (limited to 'opcodes/mips-opc.c')
| -rw-r--r-- | opcodes/mips-opc.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 5cb8e73..e47d1fd 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -1962,15 +1962,15 @@ const struct mips_opcode mips_builtin_opcodes[] = {"invalidate", "t,o(b)", 0xb8000000, 0xfc000000, RD_1|RD_3, 0, I2, 0, I37 }, /* same */ {"invalidate", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I2, 0, I37 }, /* as swr */ {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_S, 0, I4_33, 0, I37 }, -{"synciobdma", "", 0x0000008f, 0xffffffff, NODS, 0, IOCT, 0, 0 }, -{"syncs", "", 0x0000018f, 0xffffffff, NODS, 0, IOCT, 0, 0 }, -{"syncw", "", 0x0000010f, 0xffffffff, NODS, 0, IOCT, 0, 0 }, -{"syncws", "", 0x0000014f, 0xffffffff, NODS, 0, IOCT, 0, 0 }, -{"sync_acquire", "", 0x0000044f, 0xffffffff, NODS, 0, I33, 0, 0 }, -{"sync_mb", "", 0x0000040f, 0xffffffff, NODS, 0, I33, 0, 0 }, -{"sync_release", "", 0x0000048f, 0xffffffff, NODS, 0, I33, 0, 0 }, -{"sync_rmb", "", 0x000004cf, 0xffffffff, NODS, 0, I33, 0, 0 }, -{"sync_wmb", "", 0x0000010f, 0xffffffff, NODS, 0, I33, 0, 0 }, +{"synciobdma", "", 0x0000008f, 0xffffffff, NODS, INSN2_ALIAS, IOCT, 0, 0 }, +{"syncs", "", 0x0000018f, 0xffffffff, NODS, INSN2_ALIAS, IOCT, 0, 0 }, +{"syncw", "", 0x0000010f, 0xffffffff, NODS, INSN2_ALIAS, IOCT, 0, 0 }, +{"syncws", "", 0x0000014f, 0xffffffff, NODS, INSN2_ALIAS, IOCT, 0, 0 }, +{"sync_acquire", "", 0x0000044f, 0xffffffff, NODS, INSN2_ALIAS, I33, 0, 0 }, +{"sync_mb", "", 0x0000040f, 0xffffffff, NODS, INSN2_ALIAS, I33, 0, 0 }, +{"sync_release", "", 0x0000048f, 0xffffffff, NODS, INSN2_ALIAS, I33, 0, 0 }, +{"sync_rmb", "", 0x000004cf, 0xffffffff, NODS, INSN2_ALIAS, I33, 0, 0 }, +{"sync_wmb", "", 0x0000010f, 0xffffffff, NODS, INSN2_ALIAS, I33, 0, 0 }, {"sync", "", 0x0000000f, 0xffffffff, NODS, 0, I2|G1, 0, 0 }, {"sync", "1", 0x0000000f, 0xfffff83f, NODS, 0, I32, 0, 0 }, {"sync.p", "", 0x0000040f, 0xffffffff, NODS, 0, I2, 0, 0 }, |