x86: slightly rearrange struct insn_template

This avoids holes between the individual fields, (potentially) shrinking
the overall template table size by 4 bytes per entry.

1 files changed, 4 insertions, 4 deletions

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index f0f0015..8727f11 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -852,9 +852,6 @@ typedef struct insn_template
   /* instruction name sans width suffix ("mov" for movl insns) */
   char *name;
 
-  /* how many operands */
-  unsigned int operands;
-
   /* base_opcode is the fundamental opcode byte without optional
      prefix(es).  */
   unsigned int base_opcode;
@@ -871,12 +868,15 @@ typedef struct insn_template
      AMD 3DNow! instructions.
      If this template has no extension opcode (the usual case) use None
      Instructions */
-  unsigned int extension_opcode;
+  unsigned short extension_opcode;
 #define None 0xffff		/* If no extension_opcode is possible.  */
 
   /* Opcode length.  */
   unsigned char opcode_length;
 
+  /* how many operands */
+  unsigned char operands;
+
   /* cpu feature flags */
   i386_cpu_flags cpu_flags;