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authorAndrew Burgess <aburgess@redhat.com>2023-02-28 21:40:17 +0000
committerAndrew Burgess <aburgess@redhat.com>2023-04-03 12:11:32 +0100
commit4fc808ae2a3dee6a791c2a90b25db9c7a3790563 (patch)
treefe0614df7312896a43b493167fc5733b56d48d87 /opcodes/arm-dis.c
parent71f18376db954e95a44a9281d05699a228070f77 (diff)
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opcodes/arm: adjust whitespace in cpsie instruction
While I was working on the disassembler styling for ARM I noticed that the whitespace in the cpsie instruction was inconsistent with most of the other ARM disassembly output, the disassembly for cpsie looks like this: cpsie if,#10 notice there's no space before the '#10' immediate, most other ARM instructions have a space before each operand. This commit updates the disassembler to add the missing space, and updates the tests I found that tested this instruction.
Diffstat (limited to 'opcodes/arm-dis.c')
-rw-r--r--opcodes/arm-dis.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index dffbad3..b71ab98 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -3828,11 +3828,11 @@ static const struct opcode32 arm_opcodes[] =
{ARM_FEATURE_CORE_LOW (ARM_EXT_V6),
0xf1080000, 0xfffffe3f, "cpsie\t%{B:%8'a%7'i%6'f%}"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V6),
- 0xf10a0000, 0xfffffe20, "cpsie\t%{B:%8'a%7'i%6'f%},%{I:#%0-4d%}"},
+ 0xf10a0000, 0xfffffe20, "cpsie\t%{B:%8'a%7'i%6'f%}, %{I:#%0-4d%}"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V6),
0xf10C0000, 0xfffffe3f, "cpsid\t%{B:%8'a%7'i%6'f%}"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V6),
- 0xf10e0000, 0xfffffe20, "cpsid\t%{B:%8'a%7'i%6'f%},%{I:#%0-4d%}"},
+ 0xf10e0000, 0xfffffe20, "cpsid\t%{B:%8'a%7'i%6'f%}, %{I:#%0-4d%}"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V6),
0xf1000000, 0xfff1fe20, "cps\t%{I:#%0-4d%}"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V6),