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author | H.J. Lu <hjl.tools@gmail.com> | 2016-11-07 14:58:38 -0800 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2016-11-07 14:58:38 -0800 |
commit | 48c97fa1ba7d6628352fc2433abd91a41f6c8171 (patch) | |
tree | 6ace8e9feb806261451632e6410f65abc7f9bac1 /opcodes/ChangeLog | |
parent | 5996220cfa24ef6fddb782617720cd56913b1bb7 (diff) | |
download | gdb-48c97fa1ba7d6628352fc2433abd91a41f6c8171.zip gdb-48c97fa1ba7d6628352fc2433abd91a41f6c8171.tar.gz gdb-48c97fa1ba7d6628352fc2433abd91a41f6c8171.tar.bz2 |
X86: Properly handle bad FPU opcode
Since Bad_Opcode and FGRPd9_2 were the same in i386-dis.c, all
Bad_Opcode entries in float_reg were displaced as FGRPd9_2. This
patch adds an entry for Bad_Opcode in fgrps to avoid treating it
as FGRPd9_2.
gas/
PR binutils/20775
* testsuite/gas/i386/i386.exp: Run fpu-bad.
* testsuite/gas/i386/fpu-bad.d: New file.
* testsuite/gas/i386/fpu-bad.s: Likewise.
opcodes/
PR binutils/20775
* i386-dis.c (FGRPd9_2): Replace 0 with 1.
(FGRPd9_4): Replace 1 with 2.
(FGRPd9_5): Replace 2 with 3.
(FGRPd9_6): Replace 3 with 4.
(FGRPd9_7): Replace 4 with 5.
(FGRPda_5): Replace 5 with 6.
(FGRPdb_4): Replace 6 with 7.
(FGRPde_3): Replace 7 with 8.
(FGRPdf_4): Replace 8 with 9.
(fgrps): Add an entry for Bad_Opcode.
Diffstat (limited to 'opcodes/ChangeLog')
-rw-r--r-- | opcodes/ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b58ad90..438e770 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,17 @@ +2016-11-07 H.J. Lu <hongjiu.lu@intel.com> + + PR binutils/20775 + * i386-dis.c (FGRPd9_2): Replace 0 with 1. + (FGRPd9_4): Replace 1 with 2. + (FGRPd9_5): Replace 2 with 3. + (FGRPd9_6): Replace 3 with 4. + (FGRPd9_7): Replace 4 with 5. + (FGRPda_5): Replace 5 with 6. + (FGRPdb_4): Replace 6 with 7. + (FGRPde_3): Replace 7 with 8. + (FGRPdf_4): Replace 8 with 9. + (fgrps): Add an entry for Bad_Opcode. + 2016-11-04 Andrew Burgess <andrew.burgess@embecosm.com> * arc-opc.c (arc_flag_operands): Add F_DI14. |