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authorNick Clifton <nickc@redhat.com>2011-06-13 15:18:54 +0000
committerNick Clifton <nickc@redhat.com>2011-06-13 15:18:54 +0000
commitaa137e4d51ba6638b2714f8b3856d8abfd0bf143 (patch)
treecadadb81304aeee046e706c4f71e968bba7c8fb8 /ld
parentaf199b06016f0acab1e98de12c017f51b5d3780a (diff)
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* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
Diffstat (limited to 'ld')
-rw-r--r--ld/ChangeLog14
-rw-r--r--ld/Makefile.am15
-rw-r--r--ld/Makefile.in15
-rw-r--r--ld/configure.tgt4
-rw-r--r--ld/emulparams/elf32tilegx.sh26
-rw-r--r--ld/emulparams/elf32tilepro.sh27
-rw-r--r--ld/emulparams/elf64tilegx.sh25
-rw-r--r--ld/testsuite/ChangeLog13
-rw-r--r--ld/testsuite/ld-elf/eh5.d2
-rw-r--r--ld/testsuite/ld-srec/srec.exp8
-rw-r--r--ld/testsuite/ld-tilegx/external.s43
-rw-r--r--ld/testsuite/ld-tilegx/reloc.d70
-rw-r--r--ld/testsuite/ld-tilegx/reloc.s77
-rw-r--r--ld/testsuite/ld-tilegx/tilegx.exp37
-rw-r--r--ld/testsuite/ld-tilepro/external.s33
-rw-r--r--ld/testsuite/ld-tilepro/reloc.d52
-rw-r--r--ld/testsuite/ld-tilepro/reloc.s47
-rw-r--r--ld/testsuite/ld-tilepro/tilepro.exp37
18 files changed, 544 insertions, 1 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 0a6a807..004e784 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,17 @@
+2011-06-13 Walter Lee <walt@tilera.com>
+
+ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
+ eelf32tilepro.c.
+ (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
+ (eelf32tilegx.c): New target.
+ (eelf32tilepro.c): Likewise.
+ (eelf64tilegx.c): Likewise.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Handle tilegx-*-* and tilepro-*-*.
+ * emulparams/elf32tilegx.sh: New file.
+ * emulparams/elf64tilegx.sh: New file.
+ * emulparams/elf32tilepro.sh: New file.
+
2011-06-13 Alan Modra <amodra@gmail.com>
* ldlang.c (sort_def_symbol, lang_one_common): Don't handle
diff --git a/ld/Makefile.am b/ld/Makefile.am
index f43d0ad..60c169c 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -247,6 +247,8 @@ ALL_EMULATION_SOURCES = \
eelf32ppcvxworks.c \
eelf32ppcwindiss.c \
eelf32rx.c \
+ eelf32tilegx.c \
+ eelf32tilepro.c \
eelf32vax.c \
eelf32xc16x.c \
eelf32xc16xl.c \
@@ -476,6 +478,7 @@ ALL_64_EMULATION_SOURCES = \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
eelf64ppc.c \
+ eelf64tilegx.c \
eelf_l1om.c \
eelf_l1om_fbsd.c \
eelf_x86_64.c \
@@ -909,6 +912,14 @@ eelf32_tic6x_elf_le.c: $(srcdir)/emulparams/elf32_tic6x_elf_le.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc $(srcdir)/emultempl/tic6xdsbt.em \
${GEN_DEPENDS}
${GENSCRIPTS} elf32_tic6x_elf_le "$(tdir_elf32_tic6x_elf_le)"
+eelf32tilegx.c: $(srcdir)/emulparams/elf32tilegx.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32tilegx "$(tdir_tilegx)"
+eelf32tilepro.c: $(srcdir)/emulparams/elf32tilepro.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32tilepro "$(tdir_tilepro)"
eelf32am33lin.c: $(srcdir)/emulparams/elf32am33lin.sh \
$(srcdir)/emulparams/elf32am33lin.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@@ -1959,6 +1970,10 @@ eelf64ppc.c: $(srcdir)/emulparams/elf64ppc.sh $(srcdir)/emultempl/ppc64elf.em \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64ppc "$(tdir_elf64ppc)"
+eelf64tilegx.c: $(srcdir)/emulparams/elf64tilegx.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf64tilegx "$(tdir_tilegx)"
eelf_l1om.c: $(srcdir)/emulparams/elf_l1om.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf_l1om "$(tdir_elf_l1om)"
diff --git a/ld/Makefile.in b/ld/Makefile.in
index be6959e..e382196 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -553,6 +553,8 @@ ALL_EMULATION_SOURCES = \
eelf32ppcvxworks.c \
eelf32ppcwindiss.c \
eelf32rx.c \
+ eelf32tilegx.c \
+ eelf32tilepro.c \
eelf32vax.c \
eelf32xc16x.c \
eelf32xc16xl.c \
@@ -781,6 +783,7 @@ ALL_64_EMULATION_SOURCES = \
eelf64ltsmip_fbsd.c \
eelf64mmix.c \
eelf64ppc.c \
+ eelf64tilegx.c \
eelf_l1om.c \
eelf_l1om_fbsd.c \
eelf_x86_64.c \
@@ -2582,6 +2585,14 @@ eelf32ppcwindiss.c: $(srcdir)/emulparams/elf32ppcwindiss.sh \
eelf32rx.c: $(srcdir)/emulparams/elf32rx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32rx "$(tdir_elf32rx)"
+eelf32tilegx.c: $(srcdir)/emulparams/elf32tilegx.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32tilegx "$(tdir_tilegx)"
+eelf32tilepro.c: $(srcdir)/emulparams/elf32tilepro.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32tilepro "$(tdir_tilepro)"
eelf32vax.c: $(srcdir)/emulparams/elf32vax.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32vax "$(tdir_elf32vax)"
@@ -3389,6 +3400,10 @@ eelf64lppc.c: $(srcdir)/emulparams/elf64lppc.sh \
ldemul-list.h \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf64lppc "$(tdir_elf64lppc)"
+eelf64tilegx.c: $(srcdir)/emulparams/elf64tilegx.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf64tilegx "$(tdir_tilegx)"
eelf64ltsmip.c: $(srcdir)/emulparams/elf64ltsmip.sh \
$(srcdir)/emulparams/elf64btsmip.sh $(srcdir)/emulparams/elf64bmip-defs.sh \
$(srcdir)/emulparams/elf32bmipn32-defs.sh $(ELF_DEPS) \
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 517b6be..f35298c 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -643,6 +643,10 @@ tic6x-*-uclinux) targ_emul=elf32_tic6x_linux_le
;;
tic80-*-*) targ_emul=tic80coff
;;
+tilegx-*-*) targ_emul=elf64tilegx
+ targ_extra_emuls="elf32tilegx"
+ targ_extra_libpath=$targ_extra_emuls ;;
+tilepro-*-*) targ_emul=elf32tilepro ;;
v850*-*-*) targ_emul=v850
;;
vax-dec-ultrix* | vax-dec-bsd*) targ_emul=vax ;;
diff --git a/ld/emulparams/elf32tilegx.sh b/ld/emulparams/elf32tilegx.sh
new file mode 100644
index 0000000..0b32262
--- /dev/null
+++ b/ld/emulparams/elf32tilegx.sh
@@ -0,0 +1,26 @@
+SCRIPT_NAME=elf
+OUTPUT_FORMAT="elf32-tilegx"
+TEXT_START_ADDR=0x10000
+NO_REL_RELOCS=yes
+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
+COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
+# See also `include/elf/tilegx.h'
+ARCH=tilegx
+ALIGNMENT=64
+MACHINE=
+NOP=0
+TEMPLATE_NAME=elf32
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_COMBRELOC_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+NO_SMALL_DATA=yes
+SEPARATE_GOTPLT=8
+# Look for 32 bit target libraries in /lib32, /usr/lib32 etc., first.
+LIBPATH_SUFFIX=32
+OTHER_SECTIONS="
+ /* TILE architecture interrupt vector areas */
+ .intrpt0 0xfc000000 : { KEEP(*(.intrpt0)) }
+ .intrpt1 0xfd000000 : { KEEP(*(.intrpt1)) }
+ .intrpt2 0xfe000000 : { KEEP(*(.intrpt2)) }
+ .intrpt3 0xff000000 : { KEEP(*(.intrpt3)) }
+"
diff --git a/ld/emulparams/elf32tilepro.sh b/ld/emulparams/elf32tilepro.sh
new file mode 100644
index 0000000..5fb4443
--- /dev/null
+++ b/ld/emulparams/elf32tilepro.sh
@@ -0,0 +1,27 @@
+SCRIPT_NAME=elf
+if [ -z "$OUTPUT_FORMAT" ]; then
+ # Allow overriding externally to "elf32-tile64" if desired
+ OUTPUT_FORMAT=elf32-tilepro
+fi
+TEXT_START_ADDR=0x10000
+NO_REL_RELOCS=yes
+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
+COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
+# See also `include/elf/tilepro.h'
+ARCH=tilepro
+ALIGNMENT=64
+MACHINE=
+NOP=0
+TEMPLATE_NAME=elf32
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_COMBRELOC_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+NO_SMALL_DATA=yes
+SEPARATE_GOTPLT=8
+OTHER_SECTIONS="
+ /* TILEPRO architecture interrupt vector areas */
+ .intrpt0 0xfc000000 : { KEEP(*(.intrpt0)) }
+ .intrpt1 0xfd000000 : { KEEP(*(.intrpt1)) }
+ .intrpt2 0xfe000000 : { KEEP(*(.intrpt2)) }
+ .intrpt3 0xff000000 : { KEEP(*(.intrpt3)) }
+"
diff --git a/ld/emulparams/elf64tilegx.sh b/ld/emulparams/elf64tilegx.sh
new file mode 100644
index 0000000..a2c407e
--- /dev/null
+++ b/ld/emulparams/elf64tilegx.sh
@@ -0,0 +1,25 @@
+SCRIPT_NAME=elf
+OUTPUT_FORMAT="elf64-tilegx"
+TEXT_START_ADDR=0x10000
+NO_REL_RELOCS=yes
+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
+COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
+# See also `include/elf/tilegx.h'
+ARCH=tilegx
+ALIGNMENT=64
+MACHINE=
+NOP=0
+# Note that "elf32.em" actually handles elf64 also.
+TEMPLATE_NAME=elf32
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_COMBRELOC_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+NO_SMALL_DATA=yes
+SEPARATE_GOTPLT=16
+OTHER_SECTIONS="
+ /* TILE architecture interrupt vector areas */
+ .intrpt0 0xfffffffffc000000 : { KEEP(*(.intrpt0)) }
+ .intrpt1 0xfffffffffd000000 : { KEEP(*(.intrpt1)) }
+ .intrpt2 0xfffffffffe000000 : { KEEP(*(.intrpt2)) }
+ .intrpt3 0xffffffffff000000 : { KEEP(*(.intrpt3)) }
+"
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index d224e3c..6241277 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,16 @@
+2011-06-13 Walter Lee <walt@tilera.com>
+
+ * ld-elf/eh5.d: Don't run on tile*.
+ * ld-srec/srec.exp: xfail on tile*.
+ * ld-tilegx/external.s: New file.
+ * ld-tilegx/reloc.d: New file.
+ * ld-tilegx/reloc.s: New file.
+ * ld-tilegx/tilegx.exp: New file.
+ * ld-tilepro/external.s: New file.
+ * ld-tilepro/reloc.d: New file.
+ * ld-tilepro/reloc.s: New file.
+ * ld-tilepro/tilepro.exp: New file.
+
2011-06-10 Nick Clifton <nickc@redhat.com>
* ld-elf/elf.exp: Add test for linking a shared library with a
diff --git a/ld/testsuite/ld-elf/eh5.d b/ld/testsuite/ld-elf/eh5.d
index bc25639..f862382 100644
--- a/ld/testsuite/ld-elf/eh5.d
+++ b/ld/testsuite/ld-elf/eh5.d
@@ -4,7 +4,7 @@
#ld:
#readelf: -wf
#target: cfi
-#notarget: alpha* hppa64*
+#notarget: alpha* hppa64* tile*
Contents of the .eh_frame section:
diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp
index 3051026..25dfb06 100644
--- a/ld/testsuite/ld-srec/srec.exp
+++ b/ld/testsuite/ld-srec/srec.exp
@@ -364,6 +364,13 @@ setup_xfail "score-*-*"
# The S-record linker doesn't support Blackfin ELF FDPIC ABI.
setup_xfail "bfin-*-linux-uclibc"
+# On tile, we appear to be getting some random-seeming zeroing or 24-bit
+# rightshifts (!) in the output when directly generating S-records from
+# the linker. Not clear what could be causing this but we don't
+# anticipate creating s-records (and could always use objcopy to
+# generate the format if need be).
+setup_xfail "tile*-*-*"
+
run_srec_test $test1 "tmpdir/sr1.o tmpdir/sr2.o"
# Now try linking a C++ program with global constructors and
@@ -393,5 +400,6 @@ setup_xfail "ia64-*-*"
setup_xfail "*-*-cygwin*" "*-*-mingw*" "*-*-pe*" "*-*-winnt*"
setup_xfail "score-*-*"
setup_xfail "bfin-*-linux-uclibc"
+setup_xfail "tile*-*-*"
run_srec_test $test2 "tmpdir/sr3.o"
diff --git a/ld/testsuite/ld-tilegx/external.s b/ld/testsuite/ld-tilegx/external.s
new file mode 100644
index 0000000..ab681bc
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/external.s
@@ -0,0 +1,43 @@
+ .text
+ .global external1
+external1:
+ j external1
+
+ .global external2
+external2:
+ j external1
+
+ .global external_5a
+external_5a = 19
+ .global external_5b
+external_5b = 31
+
+ .global external_8a
+external_8a = 17
+ .global external_8b
+external_8b = 119
+
+ .global external_16a
+external_16a = -32134
+ .global external_16b
+external_16b = 19300
+
+ .global external_32a
+external_32a = 0x12345678
+ .global external_32b
+external_32b = -0x76543210
+
+ .global external_48a
+external_48a = 0x123456789abc
+ .global external_48b
+external_48b = 0x76543210fedc
+
+ .global external_64a
+external_64a = 0x123456789abcdef0
+ .global external_64b
+external_64b = 0xfedcba9876543210
+
+ .data
+
+ .global external_data1
+external_data1:
diff --git a/ld/testsuite/ld-tilegx/reloc.d b/ld/testsuite/ld-tilegx/reloc.d
new file mode 100644
index 0000000..c9acdac
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/reloc.d
@@ -0,0 +1,70 @@
+
+.*: file format elf64-tilegx.*
+
+Contents of section .text:
+ 100b0 .*
+ 100c0 .*
+ 100d0 .*
+ 100e0 .*
+ 100f0 .*
+ 10100 .*
+ 10110 .*
+ 10120 .*
+ 10130 .*
+ 10140 .*
+ 10150 .*
+ 10160 .*
+ 10170 .*
+ 10180 .*
+ 10190 .*
+ 101a0 .*
+ 101b0 .*
+ 101c0 .*
+Contents of section .data:
+ 201e0 b8010100 c0010100 7a82644b 11773200 .*
+ 201f0 00002e00 2c7a8234 12785634 127856bc .*
+ 20200 9a341278 56bc9af0 de000000 00000000 .*
+ 20210 00000000 00000000 00000000 00000000 .*
+
+Disassembly of section .text:
+
+00000000000100b0 <_start>:
+ 100b0: [0-9a-f]* { add r2, zero, zero }
+ 100b8: [0-9a-f]* { j 101b8 <external1> }
+ 100c0: [0-9a-f]* { add r3, r2, r2 }
+ 100c8: [0-9a-f]* { beqzt zero, 101c0 <external2> }
+ 100d0: [0-9a-f]* { movei r2, 17 ; movei r3, 119 }
+ 100d8: [0-9a-f]* { movei r2, 17 ; movei r3, 119 ; ld zero, zero }
+ 100e0: [0-9a-f]* { mtspr 17, zero }
+ 100e8: [0-9a-f]* { mfspr zero, 17 }
+ 100f0: [0-9a-f]* { moveli r2, -32134 ; moveli r3, 19300 }
+ 100f8: [0-9a-f]* { moveli r2, 4660 ; moveli r3, -30293 }
+ 10100: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, -12816 }
+ 10108: [0-9a-f]* { moveli r2, 4660 ; moveli r3, 30292 }
+ 10110: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, 12816 }
+ 10118: [0-9a-f]* { shl16insli r2, r2, -25924 ; shl16insli r3, r3, -292 }
+ 10120: [0-9a-f]* { moveli r2, 4660 ; moveli r3, -292 }
+ 10128: [0-9a-f]* { shl16insli r2, r2, 22136 ; shl16insli r3, r3, -17768 }
+ 10130: [0-9a-f]* { shl16insli r2, r2, -25924 ; shl16insli r3, r3, 30292 }
+ 10138: [0-9a-f]* { shl16insli r2, r2, -8464 ; shl16insli r3, r3, 12816 }
+ 10140: [0-9a-f]* { ld_add r0, r0, 17 }
+ 10148: [0-9a-f]* { st_add r0, r0, 17 }
+ 10150: [0-9a-f]* { mm r2, r3, 19, 31 }
+ 10158: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 }
+ 10160: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; ld zero, zero }
+ 10168: [0-9a-f]* { moveli r0, 80 ; moveli r1, 80 }
+ 10170: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 }
+ 10178: [0-9a-f]* { moveli r0, 168 ; moveli r1, 168 }
+ 10180: [0-9a-f]* { moveli r0, 4096 ; moveli r1, 4096 }
+ 10188: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 }
+ 10190: [0-9a-f]* { moveli r0, 144 ; moveli r1, 144 }
+ 10198: [0-9a-f]* { moveli r0, 4096 ; moveli r1, 4096 }
+ 101a0: [0-9a-f]* { moveli r0, 0 ; moveli r1, 0 }
+ 101a8: [0-9a-f]* { moveli r0, 1 ; moveli r1, 1 }
+ 101b0: [0-9a-f]* { moveli r0, 112 ; moveli r1, 112 }
+
+00000000000101b8 <external1>:
+ 101b8: [0-9a-f]* { j 101b8 <external1> }
+
+00000000000101c0 <external2>:
+ 101c0: [0-9a-f]* { j 101b8 <external1> }
diff --git a/ld/testsuite/ld-tilegx/reloc.s b/ld/testsuite/ld-tilegx/reloc.s
new file mode 100644
index 0000000..4a19388
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/reloc.s
@@ -0,0 +1,77 @@
+ .text
+ .global _start
+_start:
+ add r2,zero,zero
+ j external1
+
+ add r3,r2,r2
+ beqzt zero,external2
+
+ { movei r2,external_8a; movei r3,external_8b }
+ { movei r2,external_8a; movei r3,external_8b; ld zero,zero }
+ { mtspr external_8a,zero }
+ { mfspr zero,external_8a }
+ { moveli r2,external_16a; moveli r3,external_16b }
+
+ { moveli r2,hw1_last(external_32a); moveli r3,hw1_last(external_32b) }
+ { shl16insli r2,r2,hw0(external_32a); shl16insli r3,r3,hw0(external_32b) }
+
+ { moveli r2,hw2_last(external_48a); moveli r3,hw2_last(external_48b) }
+ { shl16insli r2,r2,hw1(external_48a); shl16insli r3,r3,hw1(external_48b) }
+ { shl16insli r2,r2,hw0(external_48a); shl16insli r3,r3,hw0(external_48b) }
+
+ { moveli r2,hw3_last(external_64a); moveli r3,hw3_last(external_64b) }
+ { shl16insli r2,r2,hw2(external_64a); shl16insli r3,r3,hw2(external_64b) }
+ { shl16insli r2,r2,hw1(external_64a); shl16insli r3,r3,hw1(external_64b) }
+ { shl16insli r2,r2,hw0(external_64a); shl16insli r3,r3,hw0(external_64b) }
+
+ { ld_add r0,r0,external_8a }
+ { st_add r0,r0,external_8a }
+ { mm r2,r3,external_5a,external_5b }
+ { shli r2,r3,external_5a; shli r4,r5,external_5b }
+ { shli r2,r3,external_5a; shli r4,r5,external_5b; ld zero,zero }
+
+ { moveli r0, external1 - .; moveli r1, external1 - . }
+ { moveli r0, hw1_last(external_data1 - .)
+ moveli r1, hw1_last(external_data1 - .) }
+ { moveli r0, hw0(external_data1 - .)
+ moveli r1, hw0(external_data1 - .) }
+ { moveli r0, hw2_last(external_data1 - . + 0x100000000000)
+ moveli r1, hw2_last(external_data1 - . + 0x100000000000) }
+ { moveli r0, hw1(external_data1 - . + 0x100000000000)
+ moveli r1, hw1(external_data1 - . + 0x100000000000) }
+ { moveli r0, hw0(external_data1 - . + 0x100000000000)
+ moveli r1, hw0(external_data1 - . + 0x100000000000) }
+ { moveli r0, hw3_last(external_data1 - . + 0x1000000000000000)
+ moveli r1, hw3_last(external_data1 - . + 0x1000000000000000) }
+ { moveli r0, hw2(external_data1 - . + 0x1000000000000000)
+ moveli r1, hw2(external_data1 - . + 0x1000000000000000) }
+ { moveli r0, hw1(external_data1 - . + 0x1000000000000000)
+ moveli r1, hw1(external_data1 - . + 0x1000000000000000) }
+ { moveli r0, hw0(external_data1 - . + 0x1000000000000000)
+ moveli r1, hw0(external_data1 - . + 0x1000000000000000) }
+
+ .data
+ .align 0x20
+ .int external1
+ .int external2
+ .short external_16a, external_16b
+ .byte external_8a, external_8b
+
+ .int (external_data1-.)
+ .short (external_data1-.)
+ .byte (external_data1-.)
+
+ .short hw0_last(external_16a)
+
+ .short hw1_last(external_32a)
+ .short hw0(external_32a)
+
+ .short hw2_last(external_48a)
+ .short hw1(external_48a)
+ .short hw0(external_48a)
+
+ .short hw3(external_64a)
+ .short hw2(external_64a)
+ .short hw1(external_64a)
+ .short hw0(external_64a)
diff --git a/ld/testsuite/ld-tilegx/tilegx.exp b/ld/testsuite/ld-tilegx/tilegx.exp
new file mode 100644
index 0000000..856b41e
--- /dev/null
+++ b/ld/testsuite/ld-tilegx/tilegx.exp
@@ -0,0 +1,37 @@
+# Expect script for TILE-Gx linker tests.
+# Copyright 2011 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+if {!([istarget "tilegx-*-*"]) } {
+ return
+}
+
+# Set up a list as described in ld-lib.exp
+
+set tilepro_tests {
+ { "tilegx relocation resolution linker test"
+ ""
+ ""
+ { "reloc.s" "external.s" }
+ { {objdump -ds reloc.d} }
+ "reloc"
+ }
+}
+
+run_ld_link_tests $tilepro_tests
diff --git a/ld/testsuite/ld-tilepro/external.s b/ld/testsuite/ld-tilepro/external.s
new file mode 100644
index 0000000..93d7556
--- /dev/null
+++ b/ld/testsuite/ld-tilepro/external.s
@@ -0,0 +1,33 @@
+ .text
+ .global external1
+external1:
+ j external1
+
+ .global external2
+external2:
+ j external1
+
+ .global external_5a
+external_5a = 19
+ .global external_5b
+external_5b = 31
+
+ .global external_8a
+external_8a = 17
+ .global external_8b
+external_8b = 119
+
+ .global external_16a
+external_16a = -32134
+ .global external_16b
+external_16b = 19300
+
+ .global external_32a
+external_32a = 0x87654321
+ .global external_32b
+external_32b = 0xfedcba98
+
+ .data
+
+ .global external_data1
+external_data1:
diff --git a/ld/testsuite/ld-tilepro/reloc.d b/ld/testsuite/ld-tilepro/reloc.d
new file mode 100644
index 0000000..35f0436
--- /dev/null
+++ b/ld/testsuite/ld-tilepro/reloc.d
@@ -0,0 +1,52 @@
+
+.*: file format elf32-tilepro.*
+
+Contents of section .text:
+ 10078 .*
+ 10088 .*
+ 10098 .*
+ 100a8 .*
+ 100b8 .*
+ 100c8 .*
+ 100d8 .*
+ 100e8 .*
+ 100f8 .*
+ 10108 .*
+ 10118 .*
+ 10128 .*
+Contents of section .data:
+ 20140 20010100 28010100 7a82644b 11773200 .*
+ 20150 00002e00 2c214398 ba6587dc fe6587dd .*
+ 20160 fe000000 00000000 00000000 00000000 .*
+ 20170 00000000 00000000 00000000 00000000 .*
+Disassembly of section .text:
+
+00010078 <_start>:
+ 10078: [0-9a-f]* { add r2, zero, zero }
+ 10080: [0-9a-f]* { j 10120 <external1> }
+ 10088: [0-9a-f]* { add r3, r2, r2 }
+ 10090: [0-9a-f]* { bzt zero, 10128 <external2> }
+ 10098: [0-9a-f]* { movei r2, 17 ; movei r3, 119 }
+ 100a0: [0-9a-f]* { movei r2, 17 ; movei r3, 119 ; lw zero, zero }
+ 100a8: [0-9a-f]* { mtspr 17, zero }
+ 100b0: [0-9a-f]* { mfspr zero, 17 }
+ 100b8: [0-9a-f]* { moveli r2, -32134 ; moveli r3, 19300 }
+ 100c0: [0-9a-f]* { moveli r2, 17185 ; moveli r3, -17768 }
+ 100c8: [0-9a-f]* { addli r2, r2, -30875 ; addli r3, r3, -292 }
+ 100d0: [0-9a-f]* { auli r2, r2, -30875 ; auli r3, r3, -291 }
+ 100d8: [0-9a-f]* { swadd r0, r0, 17 }
+ 100e0: [0-9a-f]* { mm r2, r3, r4, 19, 31 }
+ 100e8: [0-9a-f]* { nop ; mm r5, r6, r7, 19, 31 }
+ 100f0: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 }
+ 100f8: [0-9a-f]* { shli r2, r3, 19 ; shli r4, r5, 31 ; lw zero, zero }
+ 10100: [0-9a-f]* { moveli r0, 32 }
+ 10108: [0-9a-f]* { moveli r0, 120 }
+ 10110: [0-9a-f]* { moveli r0, 1 }
+ 10118: [0-9a-f]* { moveli r0, 1 }
+
+
+00010120 <external1>:
+ 10120: [0-9a-f]* { j 10120 <external1> }
+
+00010128 <external2>:
+ 10128: [0-9a-f]* { j 10120 <external1> }
diff --git a/ld/testsuite/ld-tilepro/reloc.s b/ld/testsuite/ld-tilepro/reloc.s
new file mode 100644
index 0000000..cc9ed0e
--- /dev/null
+++ b/ld/testsuite/ld-tilepro/reloc.s
@@ -0,0 +1,47 @@
+ .text
+ .global _start
+_start:
+ add r2,zero,zero
+ j external1
+
+ add r3,r2,r2
+ bzt zero,external2
+
+ { movei r2,external_8a; movei r3,external_8b }
+ { movei r2,external_8a; movei r3,external_8b; lw zero,zero }
+ { mtspr external_8a,zero }
+ { mfspr zero,external_8a }
+ { moveli r2,external_16a; moveli r3,external_16b }
+
+ { moveli r2,lo16(external_32a); moveli r3,lo16(external_32b) }
+ { addli r2,r2,hi16(external_32a); addli r3,r3,hi16(external_32b) }
+ { auli r2,r2,ha16(external_32a); auli r3,r3,ha16(external_32b) }
+
+ { swadd r0,r0,external_8a }
+ { mm r2,r3,r4,external_5a,external_5b }
+ { nop; mm r5,r6,r7,external_5a,external_5b }
+ { shli r2,r3,external_5a; shli r4,r5,external_5b }
+ { shli r2,r3,external_5a; shli r4,r5,external_5b; lw zero,zero }
+
+ moveli r0, external1 - .
+ moveli r0, lo16(external_data1 - .)
+ moveli r0, hi16(external_data1 - . + 30000)
+ moveli r0, ha16(external_data1 - . + 30000)
+
+ .data
+ .align 0x20
+ .int external1
+ .int external2
+ .short external_16a, external_16b
+ .byte external_8a, external_8b
+
+ .int (external_data1-.)
+ .short (external_data1-.)
+ .byte (external_data1-.)
+
+ .short lo16(external_32a)
+ .short lo16(external_32b)
+ .short hi16(external_32a)
+ .short hi16(external_32b)
+ .short ha16(external_32a)
+ .short ha16(external_32b)
diff --git a/ld/testsuite/ld-tilepro/tilepro.exp b/ld/testsuite/ld-tilepro/tilepro.exp
new file mode 100644
index 0000000..1cb4fde
--- /dev/null
+++ b/ld/testsuite/ld-tilepro/tilepro.exp
@@ -0,0 +1,37 @@
+# Expect script for TILEPro linker tests.
+# Copyright 2011 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+if {!([istarget "tilepro-*-*"]) } {
+ return
+}
+
+# Set up a list as described in ld-lib.exp
+
+set tilepro_tests {
+ { "tilepro relocation resolution linker test"
+ ""
+ ""
+ { "reloc.s" "external.s" }
+ { {objdump -ds reloc.d} }
+ "reloc"
+ }
+}
+
+run_ld_link_tests $tilepro_tests