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authorThomas Preud'homme <thomas.preudhomme@arm.com>2015-12-24 17:33:17 +0800
committerThomas Preud'homme <thomas.preudhomme@arm.com>2015-12-24 17:33:17 +0800
commit2fd158eb7bd4059478086143dd58edcc5ea44864 (patch)
tree52fd91c77eda5506d9817db67a01cc4355752fb9 /ld
parentff8646eef8bdef6fe3091eb79627929c1c100c6a (diff)
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Add support for linking ARMv8-M object files
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update logic around Tag_CPU_arch values to return TRUE for ARMv8-M architectures. (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for ARMv8-M. bfd/testsuite/ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", "EABI attribute merging 9" and "EABI attribute merging 10". (Thumb-Thumb farcall v8-M): Renamed to ... (Thumb-Thumb farcall v8-M Mainline): This. (Thumb-Thumb farcall v8-M Baseline): New test. * ld-arm/attr-merge-8a.s: New file. * ld-arm/attr-merge-8b.s: Likewise. * ld-arm/attr-merge-8.attr: Likewise. * ld-arm/attr-merge-9a.s: Likewise. * ld-arm/attr-merge-9b.s: Likewise. * ld-arm/attr-merge-9.out: Likewise. * ld-arm/attr-merge-10a.s: Likewise. * ld-arm/attr-merge-10b.s: Likewise. * ld-arm/attr-merge-10.attr: Likewise.
Diffstat (limited to 'ld')
-rw-r--r--ld/testsuite/ChangeLog18
-rw-r--r--ld/testsuite/ld-arm/arm-elf.exp15
-rw-r--r--ld/testsuite/ld-arm/attr-merge-10.attr6
-rw-r--r--ld/testsuite/ld-arm/attr-merge-10a.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-10b.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-8.attr6
-rw-r--r--ld/testsuite/ld-arm/attr-merge-8a.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-8b.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-9.out2
-rw-r--r--ld/testsuite/ld-arm/attr-merge-9a.s5
-rw-r--r--ld/testsuite/ld-arm/attr-merge-9b.s5
11 files changed, 77 insertions, 0 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index d8b2d3c..879aab4 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,21 @@
+2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests
+ "Thumb-Thumb farcall v8-M", "EABI attribute merging 8",
+ "EABI attribute merging 9" and "EABI attribute merging 10".
+ (Thumb-Thumb farcall v8-M): Renamed to ...
+ (Thumb-Thumb farcall v8-M Mainline): This.
+ (Thumb-Thumb farcall v8-M Baseline): New test.
+ * ld-arm/attr-merge-8a.s: New file.
+ * ld-arm/attr-merge-8b.s: Likewise.
+ * ld-arm/attr-merge-8.attr: Likewise.
+ * ld-arm/attr-merge-9a.s: Likewise.
+ * ld-arm/attr-merge-9b.s: Likewise.
+ * ld-arm/attr-merge-9.out: Likewise.
+ * ld-arm/attr-merge-10a.s: Likewise.
+ * ld-arm/attr-merge-10b.s: Likewise.
+ * ld-arm/attr-merge-10.attr: Likewise.
+
2015-12-21 Yury Usishchev <y.usishchev@samsung.com>
* ld-arm/arm-elf.exp: New test.
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index ac2abf1..724e338 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -388,6 +388,15 @@ set armeabitests_common {
{"EABI attribute merging 7" "-r" "" "" {attr-merge-7a.s attr-merge-7b.s}
{{readelf -A attr-merge-7.attr}}
"attr-merge-7"}
+ {"EABI attribute merging 8" "-r" "" "" {attr-merge-8a.s attr-merge-8b.s}
+ {{readelf -A attr-merge-8.attr}}
+ "attr-merge-8"}
+ {"EABI attribute merging 9" "-r" "" "" {attr-merge-9a.s attr-merge-9b.s}
+ {{ld attr-merge-9.out}}
+ "attr-merge-9"}
+ {"EABI attribute merging 10" "-r" "" "" {attr-merge-10a.s attr-merge-10b.s}
+ {{readelf -A attr-merge-10.attr}}
+ "attr-merge-10"}
{"EABI attribute arch merging 1" "-r" "" "" {arch-v6k.s arch-v6t2.s}
{{readelf -A attr-merge-arch-1.attr}}
"attr-merge-arch-1"}
@@ -451,6 +460,12 @@ set armeabitests_nonacl {
{"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv7-m" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-m"}
+ {"Thumb-Thumb farcall v8-M Baseline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.base" {farcall-thumb-thumb.s}
+ {{objdump -d farcall-thumb-thumb-m.d}}
+ "farcall-thumb-thumb-v8-m-base"}
+ {"Thumb-Thumb farcall v8-M Mainline" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv8-m.main" {farcall-thumb-thumb.s}
+ {{objdump -d farcall-thumb-thumb-m.d}}
+ "farcall-thumb-thumb-v8-m-main"}
{"Thumb-Thumb farcall v6-M" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv6-m" {farcall-thumb-thumb.s}
{{objdump -d farcall-thumb-thumb-m.d}}
"farcall-thumb-thumb-v6-m"}
diff --git a/ld/testsuite/ld-arm/attr-merge-10.attr b/ld/testsuite/ld-arm/attr-merge-10.attr
new file mode 100644
index 0000000..3d4e82c
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-10.attr
@@ -0,0 +1,6 @@
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "8-M.MAIN"
+ Tag_CPU_arch: v8-M.mainline
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Yes
diff --git a/ld/testsuite/ld-arm/attr-merge-10a.s b/ld/testsuite/ld-arm/attr-merge-10a.s
new file mode 100644
index 0000000..faff6bd
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-10a.s
@@ -0,0 +1,5 @@
+ .arch armv8-m.base
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.BASE
+ .eabi_attribute Tag_CPU_arch, 16
+ .eabi_attribute Tag_CPU_arch_profile, 'M'
diff --git a/ld/testsuite/ld-arm/attr-merge-10b.s b/ld/testsuite/ld-arm/attr-merge-10b.s
new file mode 100644
index 0000000..68625d3
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-10b.s
@@ -0,0 +1,5 @@
+ .arch armv8-m.main
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M.MAIN
+ .eabi_attribute Tag_CPU_arch, 17
+ .eabi_attribute Tag_CPU_arch_profile, 'M'
diff --git a/ld/testsuite/ld-arm/attr-merge-8.attr b/ld/testsuite/ld-arm/attr-merge-8.attr
new file mode 100644
index 0000000..7f922ac
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-8.attr
@@ -0,0 +1,6 @@
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "8-M.BASE"
+ Tag_CPU_arch: v8-M.baseline
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Yes
diff --git a/ld/testsuite/ld-arm/attr-merge-8a.s b/ld/testsuite/ld-arm/attr-merge-8a.s
new file mode 100644
index 0000000..fc5ea8b
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-8a.s
@@ -0,0 +1,5 @@
+ .arch armv6-m
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v6-M
+ .eabi_attribute Tag_CPU_arch, 11
+ .eabi_attribute Tag_CPU_arch_profile, 'M'
diff --git a/ld/testsuite/ld-arm/attr-merge-8b.s b/ld/testsuite/ld-arm/attr-merge-8b.s
new file mode 100644
index 0000000..8ee553a
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-8b.s
@@ -0,0 +1,5 @@
+ .arch armv8-m.base
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M Baseline
+ .eabi_attribute Tag_CPU_arch, 16
+ .eabi_attribute Tag_CPU_arch_profile, 'M'
diff --git a/ld/testsuite/ld-arm/attr-merge-9.out b/ld/testsuite/ld-arm/attr-merge-9.out
new file mode 100644
index 0000000..bb09181
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-9.out
@@ -0,0 +1,2 @@
+.*: error: .*: Conflicting CPU architectures 10/16
+.*: failed to merge target specific data of file tmpdir/attr-merge-9b.o
diff --git a/ld/testsuite/ld-arm/attr-merge-9a.s b/ld/testsuite/ld-arm/attr-merge-9a.s
new file mode 100644
index 0000000..0e24017
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-9a.s
@@ -0,0 +1,5 @@
+ .arch armv7-m
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v7-M
+ .eabi_attribute Tag_CPU_arch, 10
+ .eabi_attribute Tag_CPU_arch_profile, 'M'
diff --git a/ld/testsuite/ld-arm/attr-merge-9b.s b/ld/testsuite/ld-arm/attr-merge-9b.s
new file mode 100644
index 0000000..8ee553a
--- /dev/null
+++ b/ld/testsuite/ld-arm/attr-merge-9b.s
@@ -0,0 +1,5 @@
+ .arch armv8-m.base
+
+ @ Tag_CPU_arch & Tag_CPU_arch_profile = v8-M Baseline
+ .eabi_attribute Tag_CPU_arch, 16
+ .eabi_attribute Tag_CPU_arch_profile, 'M'