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author | Andrew Stubbs <andrew.stubbs@st.com> | 2008-04-15 15:53:26 +0000 |
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committer | Andrew Stubbs <andrew.stubbs@st.com> | 2008-04-15 15:53:26 +0000 |
commit | 52b5ca5b35537a5081916c09c8238beae153ae29 (patch) | |
tree | 5d6dd72195cf2f50454e5d159d203c2f31cadd57 /ld/testsuite/ld-sh/arch/sh3e.s | |
parent | 18ac113bcca70c9d886dbdeefd660836ab6c5bf6 (diff) | |
download | gdb-52b5ca5b35537a5081916c09c8238beae153ae29.zip gdb-52b5ca5b35537a5081916c09c8238beae153ae29.tar.gz gdb-52b5ca5b35537a5081916c09c8238beae153ae29.tar.bz2 |
2008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
gas/
* config/tc-sh.c (md_apply_fix): Make sure BFD_RELOC_SH_PCRELIMM8BY4
relocations are properly aligned, and not negative.
gas/testsuite/
* gas/sh/arch/arch.exp: Align PC-relative instructions in the gererated
assembly files.
* gas/sh/arch/sh-dsp.s: Regenerate.
* gas/sh/arch/sh.s: Regenerate.
* gas/sh/arch/sh2.s: Regenerate.
* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
* gas/sh/arch/sh2a-nofpu.s: Regenerate.
* gas/sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
* gas/sh/arch/sh2a-or-sh4.s: Regenerate.
* gas/sh/arch/sh2a.s: Regenerate.
* gas/sh/arch/sh2e.s: Regenerate.
* gas/sh/arch/sh3-dsp.s: Regenerate.
* gas/sh/arch/sh3-nommu.s: Regenerate.
* gas/sh/arch/sh3.s: Regenerate.
* gas/sh/arch/sh3e.s: Regenerate.
* gas/sh/arch/sh4-nofpu.s: Regenerate.
* gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
* gas/sh/arch/sh4.s: Regenerate.
* gas/sh/arch/sh4a-nofpu.s: Regenerate.
* gas/sh/arch/sh4a.s: Regenerate.
* gas/sh/arch/sh4al-dsp.s: Regenerate.
* gas/sh/err-mova.s: New test.
ld/testsuite/
* ld-sh/arch/sh-dsp.s: Regenerate.
* ld-sh/arch/sh.s: Regenerate.
* ld-sh/arch/sh2.s: Regenerate.
* ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
* ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
* ld-sh/arch/sh2a-nofpu.s: Regenerate.
* ld-sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
* ld-sh/arch/sh2a-or-sh4.s: Regenerate.
* ld-sh/arch/sh2a.s: Regenerate.
* ld-sh/arch/sh2e.s: Regenerate.
* ld-sh/arch/sh3-dsp.s: Regenerate.
* ld-sh/arch/sh3-nommu.s: Regenerate.
* ld-sh/arch/sh3.s: Regenerate.
* ld-sh/arch/sh3e.s: Regenerate.
* ld-sh/arch/sh4-nofpu.s: Regenerate.
* ld-sh/arch/sh4-nommu-nofpu.s: Regenerate.
* ld-sh/arch/sh4.s: Regenerate.
* ld-sh/arch/sh4a-nofpu.s: Regenerate.
* ld-sh/arch/sh4a.s: Regenerate.
* ld-sh/arch/sh4al-dsp.s: Regenerate.
Diffstat (limited to 'ld/testsuite/ld-sh/arch/sh3e.s')
-rw-r--r-- | ld/testsuite/ld-sh/arch/sh3e.s | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/ld/testsuite/ld-sh/arch/sh3e.s b/ld/testsuite/ld-sh/arch/sh3e.s index 6fcd064..7076dfc 100644 --- a/ld/testsuite/ld-sh/arch/sh3e.s +++ b/ld/testsuite/ld-sh/arch/sh3e.s @@ -92,7 +92,8 @@ sh3e: mov.l r5,@r4 ;!/* 0010nnnnmmmm0010 mov.l <REG_M>,@<REG_N>*/{"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}, arch_sh_up} mov.l @(8,r5),r4 ;!/* 0101nnnnmmmmi4*4 mov.l @(<disp>,<REG_M>),<REG_N>*/{"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM0_4BY4}, arch_sh_up} mov.l @(8,GBR),R0 ;!/* 11000110i8*4.... mov.l @(<disp>,GBR),R0*/{"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM0_8BY4}, arch_sh_up} - mov.l @(8,PC),r4 ;!/* 1101nnnni8p4.... mov.l @(<disp>,PC),<REG_N>*/{"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}, arch_sh_up} + .align 2 + mov.l @(8,PC),r4 ;!/* 1101nnnni8p4.... mov.l @(<disp>,PC),<REG_N>*/{"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}, arch_sh_up} mov.l @(R0,r5),r4 ;!/* 0000nnnnmmmm1110 mov.l @(R0,<REG_M>),<REG_N>*/{"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}, arch_sh_up} mov.l @r5+,r4 ;!/* 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>*/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} mov.l @r5,r4 ;!/* 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>*/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} @@ -108,7 +109,8 @@ sh3e: mov.w @r5,r4 ;!/* 0110nnnnmmmm0001 mov.w @<REG_M>,<REG_N>*/{"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}, arch_sh_up} mov.w R0,@(8,r5) ;!/* 10000001mmmmi4*2 mov.w R0,@(<disp>,<REG_M>)*/{"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM1_4BY2}, arch_sh_up} mov.w R0,@(8,GBR) ;!/* 11000001i8*2.... mov.w R0,@(<disp>,GBR)*/{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM1_8BY2}, arch_sh_up} - mova @(8,PC),R0 ;!/* 11000111i8p4.... mova @(<disp>,PC),R0*/{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}, arch_sh_up} + .align 2 + mova @(8,PC),R0 ;!/* 11000111i8p4.... mova @(<disp>,PC),R0*/{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}, arch_sh_up} movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up} muls.w r5,r4 ;!/* 0010nnnnmmmm1111 muls.w <REG_M>,<REG_N>*/{"muls.w",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up} muls r5,r4 ;!/* 0010nnnnmmmm1111 muls <REG_M>,<REG_N>*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}, arch_sh_up} |