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| author | Richard Earnshaw <rearnsha@arm.com> | 2024-04-29 13:59:38 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2024-05-14 10:56:58 +0100 |
| commit | ad5da6e6d86d5a13ececcd52bf068c42e8024b9c (patch) | |
| tree | 1938561329e7a26f69cbc6b7646812e2e0afc206 /include | |
| parent | e06a561b73d7b6dc5a003812ae9a6164f356ced3 (diff) | |
| download | gdb-ad5da6e6d86d5a13ececcd52bf068c42e8024b9c.zip gdb-ad5da6e6d86d5a13ececcd52bf068c42e8024b9c.tar.gz gdb-ad5da6e6d86d5a13ececcd52bf068c42e8024b9c.tar.bz2 | |
arm: opcodes: remove Maverick disassembly.
Remove the patterns to match Maverick co-processor instructions from
the disassembly tables.
This required fixing a couple of tests in the assembler testsuite
where we, probably incorrectly, disassembled generic co-processor
instructions as a Maverick instruction (it particularly made no sense
to do this for Armv6t2 in Thumb state).
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/arm.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/include/opcode/arm.h b/include/opcode/arm.h index b22e841..faa793c 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -98,7 +98,7 @@ /* Co-processor space extensions. */ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ -#define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */ +/* unused 0x00000002 */ #define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */ #define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology @@ -107,7 +107,7 @@ #define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */ #define FPU_FPA_EXT_V1 0x40000000 /* Base FPA instruction set. */ #define FPU_FPA_EXT_V2 0x20000000 /* LFM/SFM. */ -#define FPU_MAVERICK 0x10000000 /* Cirrus Maverick. */ +/* unused 0x10000000 */ #define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */ #define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */ #define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */ @@ -325,8 +325,6 @@ #define FPU_ARCH_ENDIAN_PURE ARM_FEATURE_COPROC (FPU_ENDIAN_PURE) -#define FPU_ARCH_MAVERICK ARM_FEATURE_COPROC (FPU_MAVERICK) - #define ARM_ARCH_V1 ARM_FEATURE_CORE_LOW (ARM_AEXT_V1) #define ARM_ARCH_V2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V2) #define ARM_ARCH_V2S ARM_FEATURE_CORE_LOW (ARM_AEXT_V2S) @@ -409,7 +407,7 @@ #define ARM_ARCH_UNKNOWN ARM_FEATURE_ALL (-1, -1 & ~(ARM_EXT2_MVE | ARM_EXT2_MVE_FP), -1, -1) /* Machine type is unknown. */ #define ARM_ANY ARM_FEATURE_ALL (-1, -1 & ~(ARM_EXT2_MVE | ARM_EXT2_MVE_FP), -1, 0) /* Any basic core. */ #define FPU_ANY ARM_FEATURE_COPROC (-1 & ~(ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)) /* Any FPU. */ -#define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) +#define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD) /* Extensions containing some Thumb-2 instructions. If any is present, Thumb ISA is Thumb-2. */ #define ARM_ARCH_THUMB2 ARM_FEATURE_CORE (ARM_EXT_V6T2 | ARM_EXT_V7 \ |