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author | Spencer E. Olson <olsonse@umich.edu> | 2020-11-09 12:41:09 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2020-11-09 12:41:09 +0000 |
commit | 9372689d72f902c8bae90536acc4747fb0a4b1e1 (patch) | |
tree | b6ec12b88ad28b41ba92f290df2cb10531ad7614 /include | |
parent | 4a3e3e228280ebbd6320743c1bc2f1401e70300c (diff) | |
download | gdb-9372689d72f902c8bae90536acc4747fb0a4b1e1.zip gdb-9372689d72f902c8bae90536acc4747fb0a4b1e1.tar.gz gdb-9372689d72f902c8bae90536acc4747fb0a4b1e1.tar.bz2 |
Add support for the LMBD (left-most bit detect) instruction to the PRU assembler.
include * opcode/pru.h: Add LMBD (left-most bit detect) opcode index
opcodes * pru-opc.c: Add opcode description for LMBD (left-most bit detect)
gas * testsuite/gas/pru/misc.s: Add tests for lmbd (left-most bit detect)
* testsuite/gas/pru/misc.d: Add tests for lmbd (left-most bit
Diffstat (limited to 'include')
-rw-r--r-- | include/ChangeLog | 4 | ||||
-rw-r--r-- | include/opcode/pru.h | 34 |
2 files changed, 22 insertions, 16 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 5a4f453..f54d85d 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2020-11-09 Spencer E. Olson <olsonse@umich.edu> + + * opcode/pru.h: Add LMBD (left-most bit detect) opcode index. + 2020-11-09 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * opcode/aarch64.h (enum aarch64_opnd): Add new operand AARCH64_OPND_Rt_LS64. diff --git a/include/opcode/pru.h b/include/opcode/pru.h index 74cc27a..7698831 100644 --- a/include/opcode/pru.h +++ b/include/opcode/pru.h @@ -44,25 +44,27 @@ enum overflow_type no_overflow }; -enum opcode_format_type { - opcode_format1, - opcode_format2ab, - opcode_format2abl, - opcode_format2c, - opcode_format2de, - opcode_format45, - opcode_format6 +enum opcode_format_type +{ + opcode_format1, + opcode_format2ab, + opcode_format2abl, + opcode_format2c, + opcode_format2de, + opcode_format45, + opcode_format6 }; /* Opcode ID listing. Used for indexing by the simulator. */ -enum pru_instr_type { - prui_add, prui_adc, prui_sub, prui_suc, prui_lsl, prui_lsr, prui_rsb, - prui_rsc, prui_and, prui_or, prui_xor, prui_min, prui_max, prui_clr, - prui_set, prui_not, prui_jmp, prui_jal, prui_ldi, prui_halt, prui_slp, - prui_xin, prui_xout, prui_xchg, prui_sxin, prui_sxout, prui_sxchg, - prui_loop, prui_iloop, prui_qbgt, prui_qbge, prui_qblt, prui_qble, - prui_qbeq, prui_qbne, prui_qba, prui_qbbs, prui_qbbc, prui_lbbo, - prui_sbbo, prui_lbco, prui_sbco +enum pru_instr_type +{ + prui_add, prui_adc, prui_sub, prui_suc, prui_lsl, prui_lsr, prui_rsb, + prui_rsc, prui_and, prui_or, prui_xor, prui_min, prui_max, prui_clr, + prui_set, prui_not, prui_jmp, prui_jal, prui_ldi, prui_lmbd, + prui_halt, prui_slp, prui_xin, prui_xout, prui_xchg, prui_sxin, + prui_sxout, prui_sxchg, prui_loop, prui_iloop, prui_qbgt, prui_qbge, + prui_qblt, prui_qble, prui_qbeq, prui_qbne, prui_qba, prui_qbbs, + prui_qbbc, prui_lbbo, prui_sbbo, prui_lbco, prui_sbco }; /* This structure holds information for a particular instruction. |