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| author | Tamar Christina <tamar.christina@arm.com> | 2017-11-07 10:17:21 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2017-11-07 10:17:21 +0000 |
| commit | 0198d5e6fc331d50dc19b7f250ac4bc510a8dbb5 (patch) | |
| tree | 3251e51ec4977041bf47ac3859e59641e15a2162 /include | |
| parent | db84fff3f888bb3e6d51ad24b6bfa2c6e2c3a206 (diff) | |
| download | gdb-0198d5e6fc331d50dc19b7f250ac4bc510a8dbb5.zip gdb-0198d5e6fc331d50dc19b7f250ac4bc510a8dbb5.tar.gz gdb-0198d5e6fc331d50dc19b7f250ac4bc510a8dbb5.tar.bz2 | |
This patch similarly to the AArch64 one enables Dot Product support by default for the Cortex-A55 and Cortex-A75 which have hardware support for these instructions.
gas * config/tc-arm.c (arm_cpus):
Change FPU_ARCH_CRYPTO_NEON_VFP_ARMV8
into FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD.
include * opcode/arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD):
New macro.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/arm.h | 47 |
2 files changed, 33 insertions, 19 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 638ec43..40dfb45 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2017-11-07 Tamar Christina <tamar.christina@arm.com> + + * opcode/arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD): + New macro. + 2017-11-02 Siddhesh Poyarekar <siddhesh@sourceware.org> * include/opcode/aarch64.h (AARCH64_ARCH_V8_2): Drop diff --git a/include/opcode/arm.h b/include/opcode/arm.h index e11ac7c..3b51aba 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -70,8 +70,8 @@ /* Co-processor space extensions. */ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ #define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */ -#define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */ -#define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology coprocessor version 2. */ +#define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */ +#define ARM_CEXT_IWMMXT2 0x00000008 /* Intel Wireless MMX technology coprocessor version 2. */ #define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */ #define FPU_ENDIAN_BIG 0 /* Double words-big-endian. */ @@ -227,6 +227,9 @@ | FPU_VFP_ARMV8) #define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \ ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8) +#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD \ + ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8 | \ + FPU_NEON_EXT_DOTPROD) #define ARCH_CRC_ARMV8 ARM_FEATURE_COPROC (CRC_EXT_ARMV8) #define FPU_ARCH_NEON_VFP_ARMV8_1 \ ARM_FEATURE_COPROC (FPU_NEON_ARMV8 \ @@ -362,31 +365,37 @@ typedef struct ((CPU).core[0] == ((arm_feature_set)ARM_ANY).core[0] \ && (CPU).core[1] == ((arm_feature_set)ARM_ANY).core[1]) -#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \ - do { \ - (TARG).core[0] = (F1).core[0] | (F2).core[0];\ - (TARG).core[1] = (F1).core[1] | (F2).core[1];\ - (TARG).coproc = (F1).coproc | (F2).coproc; \ - } while (0) - -#define ARM_CLEAR_FEATURE(TARG,F1,F2) \ - do { \ - (TARG).core[0] = (F1).core[0] &~ (F2).core[0];\ - (TARG).core[1] = (F1).core[1] &~ (F2).core[1];\ - (TARG).coproc = (F1).coproc &~ (F2).coproc; \ - } while (0) +#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \ + do \ + { \ + (TARG).core[0] = (F1).core[0] | (F2).core[0]; \ + (TARG).core[1] = (F1).core[1] | (F2).core[1]; \ + (TARG).coproc = (F1).coproc | (F2).coproc; \ + } \ + while (0) + +#define ARM_CLEAR_FEATURE(TARG,F1,F2) \ + do \ + { \ + (TARG).core[0] = (F1).core[0] &~ (F2).core[0]; \ + (TARG).core[1] = (F1).core[1] &~ (F2).core[1]; \ + (TARG).coproc = (F1).coproc &~ (F2).coproc; \ + } \ + while (0) #define ARM_FEATURE_COPY(F1, F2) \ - do { \ + do \ + { \ (F1).core[0] = (F2).core[0]; \ (F1).core[1] = (F2).core[1]; \ (F1).coproc = (F2).coproc; \ - } while (0) + } \ + while (0) #define ARM_FEATURE_EQUAL(T1,T2) \ - ((T1).core[0] == (T2).core[0] \ + ( (T1).core[0] == (T2).core[0] \ && (T1).core[1] == (T2).core[1] \ - && (T1).coproc == (T2).coproc) + && (T1).coproc == (T2).coproc) #define ARM_FEATURE_ZERO(T) \ ((T).core[0] == 0 && (T).core[1] == 0 && (T).coproc == 0) |