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author | Mike Frysinger <vapier@gentoo.org> | 2022-12-10 06:33:58 -0500 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2022-12-20 21:06:32 -0500 |
commit | d026e67ed41a249ec758847008d8a19257bf45fc (patch) | |
tree | cc49e25810d2453ed8ed389f9e79eff4be34eb59 /include/sim/sim-rl78.h | |
parent | 897903a2104878d541a6370b12644ec34afb389b (diff) | |
download | gdb-d026e67ed41a249ec758847008d8a19257bf45fc.zip gdb-d026e67ed41a249ec758847008d8a19257bf45fc.tar.gz gdb-d026e67ed41a249ec758847008d8a19257bf45fc.tar.bz2 |
sim: move register headers into sim/ namespace [PR sim/29869]
These headers define the register numbers for each port to implement
the sim_fetch_register & sim_store_register interfaces. While gdb
uses these, the APIs are part of the sim, not gdb. Move the headers
out of the gdb/ include namespace and into sim/ instead.
Diffstat (limited to 'include/sim/sim-rl78.h')
-rw-r--r-- | include/sim/sim-rl78.h | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/include/sim/sim-rl78.h b/include/sim/sim-rl78.h new file mode 100644 index 0000000..6c3a2a6 --- /dev/null +++ b/include/sim/sim-rl78.h @@ -0,0 +1,76 @@ +/* sim-rx.h --- interface between rl78 simulator and GDB. + + Copyright (C) 2011-2022 Free Software Foundation, Inc. + + Contributed by Red Hat. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#if !defined (SIM_RL78_H) +#define SIM_RL78_H + +enum sim_rl78_regnum +{ + sim_rl78_bank0_r0_regnum, + sim_rl78_bank0_r1_regnum, + sim_rl78_bank0_r2_regnum, + sim_rl78_bank0_r3_regnum, + sim_rl78_bank0_r4_regnum, + sim_rl78_bank0_r5_regnum, + sim_rl78_bank0_r6_regnum, + sim_rl78_bank0_r7_regnum, + + sim_rl78_bank1_r0_regnum, + sim_rl78_bank1_r1_regnum, + sim_rl78_bank1_r2_regnum, + sim_rl78_bank1_r3_regnum, + sim_rl78_bank1_r4_regnum, + sim_rl78_bank1_r5_regnum, + sim_rl78_bank1_r6_regnum, + sim_rl78_bank1_r7_regnum, + + sim_rl78_bank2_r0_regnum, + sim_rl78_bank2_r1_regnum, + sim_rl78_bank2_r2_regnum, + sim_rl78_bank2_r3_regnum, + sim_rl78_bank2_r4_regnum, + sim_rl78_bank2_r5_regnum, + sim_rl78_bank2_r6_regnum, + sim_rl78_bank2_r7_regnum, + + sim_rl78_bank3_r0_regnum, + sim_rl78_bank3_r1_regnum, + sim_rl78_bank3_r2_regnum, + sim_rl78_bank3_r3_regnum, + sim_rl78_bank3_r4_regnum, + sim_rl78_bank3_r5_regnum, + sim_rl78_bank3_r6_regnum, + sim_rl78_bank3_r7_regnum, + + sim_rl78_psw_regnum, + sim_rl78_es_regnum, + sim_rl78_cs_regnum, + sim_rl78_pc_regnum, + + sim_rl78_spl_regnum, + sim_rl78_sph_regnum, + sim_rl78_pmc_regnum, + sim_rl78_mem_regnum, + + sim_rl78_num_regs +}; + +#endif /* SIM_RL78_H */ |