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author | Claudiu Zissulescu <claziss@synopsys.com> | 2016-04-04 16:03:53 +0200 |
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committer | Claudiu Zissulescu <claziss@synopsys.com> | 2016-04-12 10:06:07 +0200 |
commit | b99747aeed79ad69af8b8be4d9aa3a74200fca7d (patch) | |
tree | 0727778359e679c25a075cf2c2e0d555045e42f9 /include/opcode | |
parent | 37ab977937f89c6601e616085ff9702d6e727ec8 (diff) | |
download | gdb-b99747aeed79ad69af8b8be4d9aa3a74200fca7d.zip gdb-b99747aeed79ad69af8b8be4d9aa3a74200fca7d.tar.gz gdb-b99747aeed79ad69af8b8be4d9aa3a74200fca7d.tar.bz2 |
Add support for .extInstruction pseudo-op.
gas/
2016-04-04 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/textinsn-errors.d: New File.
* testsuite/gas/arc/textinsn-errors.err: Likewise.
* testsuite/gas/arc/textinsn-errors.s: Likewise.
* testsuite/gas/arc/textinsn2op.d: Likewise.
* testsuite/gas/arc/textinsn2op.s: Likewise.
* testsuite/gas/arc/textinsn2op01.d: Likewise.
* testsuite/gas/arc/textinsn2op01.s: Likewise.
* testsuite/gas/arc/textinsn3op.d: Likewise.
* testsuite/gas/arc/textinsn3op.s: Likewise.
* doc/c-arc.texi (ARC Directives): Add .extInstruction
documentation.
* config/tc-arc.c (arcext_section): New variable.
(arc_extinsn): New function.
(md_pseudo_table): Add .extInstruction pseudo op.
(attributes_t): New type.
(suffixclass, syntaxclass, syntaxclassmod): New constant
structures.
(find_opcode_match): Remove arc_num_opcodes.
(md_begin): Likewise.
(tokenize_extinsn): New function.
(arc_set_ext_seg): Likewise.
(create_extinst_section): Likewise.
include/
2016-04-04 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (arc_num_opcodes): Remove.
(ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
(ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
(ARC_SUFFIX_FLAG): Define.
(flags_none, flags_f, flags_cc, flags_ccf): Declare.
(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
opcodes/
2016-04-04 Claudiu Zissulescu <claziss@synopsys.com>
* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
Initialize.
(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
(arc_opcode arc_opcodes): Null terminate the array.
(arc_num_opcodes): Remove.
* arc-ext.h (INSERT_XOP): Define.
(extInstruction_t): Likewise.
(arcExtMap_instName): Delete.
(arcExtMap_insn): New function.
(arcExtMap_genOpcode): Likewise.
* arc-ext.c (ExtInstruction): Remove.
(create_map): Zero initialize instruction fields.
(arcExtMap_instName): Remove.
(arcExtMap_insn): New function.
(dump_ARC_extmap): More info while debuging.
(arcExtMap_genOpcode): New function.
* arc-dis.c (find_format): New function.
(print_insn_arc): Use find_format.
(arc_get_disassembler): Enable dump_ARC_extmap only when
debugging.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Diffstat (limited to 'include/opcode')
-rw-r--r-- | include/opcode/arc.h | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/include/opcode/arc.h b/include/opcode/arc.h index bc0e1ad..a98a2d6 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -130,7 +130,6 @@ struct arc_opcode in the order in which the disassembler should consider instructions. */ extern const struct arc_opcode arc_opcodes[]; -extern const unsigned arc_num_opcodes; /* CPU Availability. */ #define ARC_OPCODE_ARC600 0x0001 /* ARC 600 specific insns. */ @@ -494,4 +493,54 @@ extern const unsigned arc_num_relax_opcodes; #define MINSN2OP_BU (~(FIELDF | FIELDB (63) | FIELDC (63))) #define MINSN2OP_0U (~(FIELDF | FIELDC (63))) +/* Various constants used when defining an extension instruction. */ +#define ARC_SYNTAX_3OP (1 << 0) +#define ARC_SYNTAX_2OP (1 << 1) +#define ARC_OP1_MUST_BE_IMM (1 << 2) +#define ARC_OP1_IMM_IMPLIED (1 << 3) + +#define ARC_SUFFIX_NONE (1 << 0) +#define ARC_SUFFIX_COND (1 << 1) +#define ARC_SUFFIX_FLAG (1 << 2) + + +/* Constants needed to initialize extension instructions. */ +extern const unsigned char flags_none[MAX_INSN_FLGS + 1]; +extern const unsigned char flags_f[MAX_INSN_FLGS + 1]; +extern const unsigned char flags_cc[MAX_INSN_FLGS + 1]; +extern const unsigned char flags_ccf[MAX_INSN_FLGS + 1]; + +extern const unsigned char arg_none[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rarbrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zarbrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rbrbrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rarbu6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zarbu6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rbrbu6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rbrbs12[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_ralimmrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rarblimm[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zalimmrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zarblimm[MAX_INSN_ARGS + 1]; + +extern const unsigned char arg_32bit_rbrblimm[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_ralimmu6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zalimmu6[MAX_INSN_ARGS + 1]; + +extern const unsigned char arg_32bit_zalimms12[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_ralimmlimm[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zalimmlimm[MAX_INSN_ARGS + 1]; + +extern const unsigned char arg_32bit_rbrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zarc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rbu6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zau6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_rblimm[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_zalimm[MAX_INSN_ARGS + 1]; + +extern const unsigned char arg_32bit_limmrc[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_limmu6[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_limms12[MAX_INSN_ARGS + 1]; +extern const unsigned char arg_32bit_limmlimm[MAX_INSN_ARGS + 1]; + #endif /* OPCODE_ARC_H */ |