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authorNelson Chu <nelson.chu@sifive.com>2021-02-04 16:15:03 +0800
committerNelson Chu <nelson.chu@sifive.com>2021-02-04 16:52:13 +0800
commit24075dcc8592db6e17dd18ee4fd8961635691bf6 (patch)
treea9f384739e4e344444c4fe1593b71fba7e680154 /include/opcode
parent7d409ac001cce916661d345bff01ed589991e762 (diff)
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RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions.
bfd/ * elfxx-riscv.c (riscv_parse_prefixed_ext): Removed zb*. gas/ * config/tc-riscv.c (riscv_multi_subset_supports): Removed INSN_CLASS_ZB*. * testsuite/gas/riscv/bitmanip-insns-32.d: Removed. * testsuite/gas/riscv/bitmanip-insns-64.d: Removed. * testsuite/gas/riscv/bitmanip-insns.s: Removed. include/ * opcode/riscv-opc.h: Removed macros for zb* extensions. * opcode/riscv.h (riscv_insn_class): Removed INSN_CLASS_ZB*. opcodes/ * riscv-opc.c (MASK_RVB_IMM): Removed. (riscv_opcodes): Removed zb* instructions. (riscv_ext_version_table): Removed versions for zb*.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/riscv-opc.h108
-rw-r--r--include/opcode/riscv.h4
2 files changed, 0 insertions, 112 deletions
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index c16f3f4..4cf96d9 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -191,78 +191,6 @@
#define MASK_REMW 0xfe00707f
#define MATCH_REMUW 0x200703b
#define MASK_REMUW 0xfe00707f
-#define MATCH_GREVI 0x68005013
-#define MASK_GREVI 0xfc00707f
-#define MATCH_GORCI 0x28005013
-#define MASK_GORCI 0xfc00707f
-#define MATCH_PACK 0x8004033
-#define MASK_PACK 0xfe00707f
-#define MATCH_PACKW 0x800403b
-#define MASK_PACKW 0xfe00707f
-#define MATCH_SH1ADD 0x20002033
-#define MASK_SH1ADD 0xfe00707f
-#define MATCH_SH2ADD 0x20004033
-#define MASK_SH2ADD 0xfe00707f
-#define MATCH_SH3ADD 0x20006033
-#define MASK_SH3ADD 0xfe00707f
-#define MATCH_SH1ADD_UW 0x2000203b
-#define MASK_SH1ADD_UW 0xfe00707f
-#define MATCH_SH2ADD_UW 0x2000403b
-#define MASK_SH2ADD_UW 0xfe00707f
-#define MATCH_SH3ADD_UW 0x2000603b
-#define MASK_SH3ADD_UW 0xfe00707f
-#define MATCH_ADD_UW 0x800003b
-#define MASK_ADD_UW 0xfe00707f
-#define MATCH_SLLI_UW 0x800101b
-#define MASK_SLLI_UW 0xfc00707f
-#define MATCH_CLZ 0x60001013
-#define MASK_CLZ 0xfff0707f
-#define MATCH_CTZ 0x60101013
-#define MASK_CTZ 0xfff0707f
-#define MATCH_CPOP 0x60201013
-#define MASK_CPOP 0xfff0707f
-#define MATCH_MIN 0xa004033
-#define MASK_MIN 0xfe00707f
-#define MATCH_MAX 0xa006033
-#define MASK_MAX 0xfe00707f
-#define MATCH_MINU 0xa005033
-#define MASK_MINU 0xfe00707f
-#define MATCH_MAXU 0xa007033
-#define MASK_MAXU 0xfe00707f
-#define MATCH_SEXT_B 0x60401013
-#define MASK_SEXT_B 0xfff0707f
-#define MATCH_SEXT_H 0x60501013
-#define MASK_SEXT_H 0xfff0707f
-#define MATCH_ANDN 0x40007033
-#define MASK_ANDN 0xfe00707f
-#define MATCH_ORN 0x40006033
-#define MASK_ORN 0xfe00707f
-#define MATCH_XNOR 0x40004033
-#define MASK_XNOR 0xfe00707f
-#define MATCH_RORI 0x60005013
-#define MASK_RORI 0xfc00707f
-#define MATCH_ROR 0x60005033
-#define MASK_ROR 0xfe00707f
-#define MATCH_ROL 0x60001033
-#define MASK_ROL 0xfe00707f
-#define MATCH_CLZW 0x6000101b
-#define MASK_CLZW 0xfff0707f
-#define MATCH_CTZW 0x6010101b
-#define MASK_CTZW 0xfff0707f
-#define MATCH_CPOPW 0x6020101b
-#define MASK_CPOPW 0xfff0707f
-#define MATCH_RORIW 0x6000501b
-#define MASK_RORIW 0xfe00707f
-#define MATCH_RORW 0x6000503b
-#define MASK_RORW 0xfe00707f
-#define MATCH_ROLW 0x6000103b
-#define MASK_ROLW 0xfe00707f
-#define MATCH_CLMUL 0xa001033
-#define MASK_CLMUL 0xfe00707f
-#define MATCH_CLMULH 0xa003033
-#define MASK_CLMULH 0xfe00707f
-#define MATCH_CLMULR 0xa002033
-#define MASK_CLMULR 0xfe00707f
#define MATCH_AMOADD_W 0x202f
#define MASK_AMOADD_W 0xf800707f
#define MATCH_AMOXOR_W 0x2000202f
@@ -1002,42 +930,6 @@ DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
-DECLARE_INSN(grevi, MATCH_GREVI, MASK_GREVI)
-DECLARE_INSN(gorci, MATCH_GORCI, MASK_GORCI)
-DECLARE_INSN(pack, MATCH_PACK, MASK_PACK)
-DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW)
-DECLARE_INSN(sh1add, MATCH_SH1ADD, MASK_SH1ADD)
-DECLARE_INSN(sh2add, MATCH_SH2ADD, MASK_SH2ADD)
-DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD)
-DECLARE_INSN(sh1add_uw, MATCH_SH1ADD_UW, MASK_SH1ADD_UW)
-DECLARE_INSN(sh2add_uw, MATCH_SH2ADD_UW, MASK_SH2ADD_UW)
-DECLARE_INSN(sh3add_uw, MATCH_SH3ADD_UW, MASK_SH3ADD_UW)
-DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW)
-DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW)
-DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ)
-DECLARE_INSN(ctz, MATCH_CTZ, MASK_CTZ)
-DECLARE_INSN(cpop, MATCH_CPOP, MASK_CPOP)
-DECLARE_INSN(min, MATCH_MIN, MASK_MIN)
-DECLARE_INSN(max, MATCH_MAX, MASK_MAX)
-DECLARE_INSN(minu, MATCH_MINU, MASK_MINU)
-DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU)
-DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B)
-DECLARE_INSN(sext_h, MATCH_SEXT_H, MASK_SEXT_H)
-DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN)
-DECLARE_INSN(orn, MATCH_ORN, MASK_ORN)
-DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR)
-DECLARE_INSN(rori, MATCH_RORI, MASK_RORI)
-DECLARE_INSN(ror, MATCH_ROR, MASK_ROR)
-DECLARE_INSN(rol, MATCH_ROL, MASK_ROL)
-DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW)
-DECLARE_INSN(ctzw, MATCH_CTZW, MASK_CTZW)
-DECLARE_INSN(cpopw, MATCH_CPOPW, MASK_CPOPW)
-DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW)
-DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW)
-DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW)
-DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL)
-DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR)
-DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH)
DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 285d4d5..ab8b717 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -311,10 +311,6 @@ enum riscv_insn_class
INSN_CLASS_ZICSR,
INSN_CLASS_ZIFENCEI,
INSN_CLASS_ZIHINTPAUSE,
- INSN_CLASS_ZBA,
- INSN_CLASS_ZBB,
- INSN_CLASS_ZBC,
- INSN_CLASS_ZBA_OR_ZBB,
};
/* This structure holds information for a particular instruction. */