aboutsummaryrefslogtreecommitdiff
path: root/include/opcode
diff options
context:
space:
mode:
authorPeter Bergner <bergner@vnet.ibm.com>2009-02-26 22:07:33 +0000
committerPeter Bergner <bergner@vnet.ibm.com>2009-02-26 22:07:33 +0000
commit066be9f7bd8ea9121322608fcba256ac5e33093c (patch)
tree87200e1da87cf6ff1c6aa51127d9c9a1d7073cc6 /include/opcode
parent83390453c399fd336223ba1cfbcd77d5bef4c2cb (diff)
downloadgdb-066be9f7bd8ea9121322608fcba256ac5e33093c.zip
gdb-066be9f7bd8ea9121322608fcba256ac5e33093c.tar.gz
gdb-066be9f7bd8ea9121322608fcba256ac5e33093c.tar.bz2
gas/
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63", "f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63". (parse_cpu): Extend -mpower7 to accept power7 and isel instructions. gas/testsuite/ * gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests. * gas/ppc/e500mc.s: Likewise. * gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests. * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests. ("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.", "divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw", "popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.", "fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.", "fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.", "ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix", "dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx", "stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte", "frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests. * gas/ppc/power7.s: Likewise. * gas/ppc/vsx.d: New test. * gas/ppc/vsx.s: Likewise. * gas/ppc/ppc.exp: Run it. include/opcode/ * ppc.h (PPC_OPCODE_POWER7): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble the power7 and the isel instructions. * ppc-opc.c (insert_xc6, extract_xc6): New static functions. (insert_dm, extract_dm): Likewise. (XB6): Update comment to include XX2 form. (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. (RemoveXX3DM): Delete. (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", "mftgpr">: Deprecate for POWER7. <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", "frsqrte.">: Deprecate the three operand form and enable the two operand form for POWER7 and later. <"wait">: Extend to accept optional parameter. Enable for POWER7. <"waitsrv", "waitimpl">: Add extended opcodes. <"ldbrx", "stdbrx">: Enable for POWER7. <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", "xxspltw", "xxswapd">: Add VSX opcodes.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/ppc.h3
2 files changed, 7 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index adf3940..f7018b8 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2009-02-26 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc.h (PPC_OPCODE_POWER7): New.
+
2009-02-06 Doug Evans <dje@google.com>
* i386.h: Add comment regarding sse* insns and prefixes.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 1ede310..e45fc58 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -114,6 +114,9 @@ extern const int powerpc_num_opcodes;
/* Opcode is only supported by Power4 architecture. */
#define PPC_OPCODE_POWER4 0x4000
+/* Opcode is only supported by Power7 architecture. */
+#define PPC_OPCODE_POWER7 0x8000
+
/* Opcode is only supported by POWERPC Classic architecture. */
#define PPC_OPCODE_CLASSIC 0x10000