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| author | Schimpe, Christina <christina.schimpe@intel.com> | 2024-03-06 11:22:49 +0000 |
|---|---|---|
| committer | Schimpe, Christina <christina.schimpe@intel.com> | 2024-09-25 11:06:57 +0000 |
| commit | fc14343205d3a68db1fc139e4af9796be208fab4 (patch) | |
| tree | c13cb1c8c2e826556e5a1a0352a87c53f20ea8d1 /gdbsupport/x86-xstate.h | |
| parent | ee06c79b0fefd5e4ed5e7a1171dc3440130e41da (diff) | |
| download | gdb-fc14343205d3a68db1fc139e4af9796be208fab4.zip gdb-fc14343205d3a68db1fc139e4af9796be208fab4.tar.gz gdb-fc14343205d3a68db1fc139e4af9796be208fab4.tar.bz2 | |
gdb, gdbserver, python, testsuite: Remove MPX.
GDB deprecated the commands "show/set mpx bound" in GDB 15.1, as Intel
listed Intel(R) Memory Protection Extensions (MPX) as removed in 2019.
MPX is also deprecated in gcc (since v9.1), the linux kernel (since v5.6)
and glibc (since v2.35). Let's now remove MPX support in GDB completely.
This includes the removal of:
- MPX functionality including register support
- deprecated mpx commands
- i386 and amd64 implementation of the hooks report_signal_info and
get_siginfo_type
- tests
- and pretty printer.
We keep MPX register numbers to not break compatibility with old gdbservers.
Approved-By: Felix Willgerodt <felix.willgerodt@intel.com>
Diffstat (limited to 'gdbsupport/x86-xstate.h')
| -rw-r--r-- | gdbsupport/x86-xstate.h | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/gdbsupport/x86-xstate.h b/gdbsupport/x86-xstate.h index 11b3754..b9a9b6c 100644 --- a/gdbsupport/x86-xstate.h +++ b/gdbsupport/x86-xstate.h @@ -24,8 +24,6 @@ #define X86_XSTATE_X87_ID 0 #define X86_XSTATE_SSE_ID 1 #define X86_XSTATE_AVX_ID 2 -#define X86_XSTATE_BNDREGS_ID 3 -#define X86_XSTATE_BNDCFG_ID 4 #define X86_XSTATE_K_ID 5 #define X86_XSTATE_ZMM_H_ID 6 #define X86_XSTATE_ZMM_ID 7 @@ -35,9 +33,6 @@ #define X86_XSTATE_X87 (1ULL << X86_XSTATE_X87_ID) #define X86_XSTATE_SSE (1ULL << X86_XSTATE_SSE_ID) #define X86_XSTATE_AVX (1ULL << X86_XSTATE_AVX_ID) -#define X86_XSTATE_BNDREGS (1ULL << X86_XSTATE_BNDREGS_ID) -#define X86_XSTATE_BNDCFG (1ULL << X86_XSTATE_BNDCFG_ID) -#define X86_XSTATE_MPX (X86_XSTATE_BNDREGS | X86_XSTATE_BNDCFG) /* AVX 512 adds three feature bits. All three must be enabled. */ #define X86_XSTATE_K (1ULL << X86_XSTATE_K_ID) @@ -56,8 +51,6 @@ struct x86_xsave_layout { int sizeof_xsave = 0; int avx_offset = 0; - int bndregs_offset = 0; - int bndcfg_offset = 0; int k_offset = 0; int zmm_h_offset = 0; int zmm_offset = 0; @@ -69,8 +62,6 @@ constexpr bool operator== (const x86_xsave_layout &lhs, { return lhs.sizeof_xsave == rhs.sizeof_xsave && lhs.avx_offset == rhs.avx_offset - && lhs.bndregs_offset == rhs.bndregs_offset - && lhs.bndcfg_offset == rhs.bndcfg_offset && lhs.k_offset == rhs.k_offset && lhs.zmm_h_offset == rhs.zmm_h_offset && lhs.zmm_offset == rhs.zmm_offset @@ -88,21 +79,17 @@ constexpr bool operator!= (const x86_xsave_layout &lhs, #define X86_XSTATE_X87_MASK X86_XSTATE_X87 #define X86_XSTATE_SSE_MASK (X86_XSTATE_X87 | X86_XSTATE_SSE) #define X86_XSTATE_AVX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_AVX) -#define X86_XSTATE_MPX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_MPX) -#define X86_XSTATE_AVX_MPX_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_MPX) #define X86_XSTATE_AVX_AVX512_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512) -#define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK (X86_XSTATE_AVX_MPX_MASK\ +#define X86_XSTATE_AVX_AVX512_PKU_MASK (X86_XSTATE_AVX_MASK\ | X86_XSTATE_AVX512 | X86_XSTATE_PKRU) -#define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_MPX_AVX512_PKU_MASK) +#define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_AVX512_PKU_MASK) #define X86_XSTATE_SSE_SIZE 576 #define X86_XSTATE_AVX_SIZE 832 -/* In case one of the MPX XCR0 bits is set we consider we have MPX. */ -#define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0) #define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0) #define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0) #define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0) |