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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-29 10:50:11 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-07-02 15:27:53 +0200 |
| commit | 41823f29a811bb250ae274652281a6294fdc2530 (patch) | |
| tree | bb991ba76512ee196c09b435cdd8ee9215a40220 /gdb | |
| parent | c0c468d562649df0f695737262b6230b7a56a4bb (diff) | |
| download | gdb-41823f29a811bb250ae274652281a6294fdc2530.zip gdb-41823f29a811bb250ae274652281a6294fdc2530.tar.gz gdb-41823f29a811bb250ae274652281a6294fdc2530.tar.bz2 | |
gdb: Prefer RISC-V register name "s0" over "fp"
The "fp" register name is an alias for "s0" which is an alias for "x8".
The "fp" name is only understood by very recent Binutils and thus not
used by GCC. GCC does not emit a frame pointer with common optimization
options such as -Og or -O2.
It is still possible to use the "fp" register name, e.g.
(gdb) p/x $fp
$1 = 0x800367c8
works.
However, in the register dump you see now:
(gdb) info registers
...
t2 0xffffffffffffffff 18446744073709551615
s0 0x800367c8 0x800367c8
s1 0x80033280 2147693184
...
gdb/
* riscv-tdep.c (riscv_register_aliases): Swap "fp" and "s0"
entries.
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/ChangeLog | 4 | ||||
| -rw-r--r-- | gdb/riscv-tdep.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index e326785..0f601bd 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,7 @@ +2018-07-02 Sebastian Huber <sebastian.huber@embedded-brains.de> + + * riscv-tdep.c (riscv_register_aliases): Swap "fp" and "s0" entries. + 2018-06-29 Joel Brobecker <brobecker@adacore.com> * amd64-darwin-tdep.c (x86_darwin_init_abi_64): Add missing diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 1545671..4c68ef7 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -128,8 +128,8 @@ static const struct register_alias riscv_register_aliases[] = { "t0", 5 }, { "t1", 6 }, { "t2", 7 }, - { "fp", 8 }, { "s0", 8 }, + { "fp", 8 }, { "s1", 9 }, { "a0", 10 }, { "a1", 11 }, |