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author | Ivo Raisr <ivo.raisr@oracle.com> | 2017-02-05 23:44:03 -0800 |
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committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2017-02-05 23:44:03 -0800 |
commit | 3f7b46f2daa6c396564d786bda9c81e66d4b9278 (patch) | |
tree | d2341bb017668a99db92043287aa6bb2fe8c5745 /gdb/testsuite | |
parent | de32a80f8f48896d4d07babd8c998789dd07c73d (diff) | |
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gdb: provide and use sparc{32,64} target description XML files.
gdb/ChangeLog:
2017-02-06 Ivo Raisr <ivo.raisr@oracle.com>
PR tdep/20936
Provide and use sparc32 and sparc64 target description XML files.
* features/sparc/sparc32-cp0.xml, features/sparc/sparc32-cpu.xml,
features/sparc/sparc32-fpu.xml: New files for sparc 32-bit.
* features/sparc/sparc64-cp0.xml, features/sparc/sparc64-cpu.xml,
features/sparc/sparc64-fpu.xml: New files for sparc 64-bit.
* features/sparc/sparc32-solaris.xml: New file.
* features/sparc/sparc64-solaris.xml: New file.
* features/sparc/sparc32-solaris.c: Generated.
* features/sparc/sparc64-solaris.c: Generated.
* sparc-tdep.h: Account for differences in target descriptions.
* sparc-tdep.c (sparc32_register_name): Use target provided registers.
(sparc32_register_type): Use target provided registers.
(validate_tdesc_registers): New function.
(sparc32_gdbarch_init): Use tdesc_has_registers.
Set pseudoregister functions.
* sparc64-tdep.c (sparc64_register_name): Use target provided registers.
(sparc64_register_type): Use target provided registers.
(sparc64_init_abi): Set pseudoregister functions.
gdb/doc/ChangeLog:
2017-02-06 Ivo Raisr <ivo.raisr@oracle.com>
PR tdep/20936
* gdb.texinfo: (Standard Target Features): Document SPARC features.
(Sparc Features): New node.
gdb/testsuite/ChangeLog:
2017-02-06 Ivo Raisr <ivo.raisr@oracle.com>
PR tdep/20936
* gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests.
Diffstat (limited to 'gdb/testsuite')
-rw-r--r-- | gdb/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gdb/testsuite/gdb.xml/tdesc-regs.exp | 9 |
2 files changed, 14 insertions, 0 deletions
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index c098bd0..9aeec87 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> + + PR tdep/20936 + * gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests. + 2017-02-03 Tom Tromey <tom@tromey.com> PR rust/21097: diff --git a/gdb/testsuite/gdb.xml/tdesc-regs.exp b/gdb/testsuite/gdb.xml/tdesc-regs.exp index 9909aad..70fc0e0 100644 --- a/gdb/testsuite/gdb.xml/tdesc-regs.exp +++ b/gdb/testsuite/gdb.xml/tdesc-regs.exp @@ -57,6 +57,15 @@ switch -glob -- [istarget] { "s390*-*-*" { set core-regs {s390-core32.xml s390-acr.xml s390-fpr.xml} } + "sparc-*-*" { + set regdir "sparc/" + set core-regs {sparc32-cpu.xml sparc32-fpu.xml sparc32-cp0.xml} + } + "sparc64-*-*" { + set architecture "sparc:v9" + set regdir "sparc/" + set core-regs {sparc64-cpu.xml sparc64-fpu.xml sparc64-cp0.xml} + } "spu*-*-*" { # This may be either the spu-linux-nat target, or the Cell/B.E. # multi-architecture debugger in SPU standalone executable mode. |