Convert the RX target to make use of target descriptions.

gdb/ChangeLog

2019-08-25  Yoshinori Sato <ysato@users.sourceforge.jp>

	* gdb/rx-tdep.c (rx_register_names): New.
	(rx_register_name): Delete.
	(rx_psw_type): Delete.
	(rx_fpsw_type): Delete.
	(rx_register_type): Delete.
	(rx_gdbarch_init): Convert target-descriptions.
	(_initialize_rx_tdep): Add initialize_tdesc_rx.
	* gdb/features/Makefile: Add rx.xml.
	* gdb/features/rx.xml: New.
	* gdb/features/rx.c: Generated.
	* gdb/NEWS: Mention target description support.

gdb/doc/ChangeLog:

2019-08-25  Yoshinori Sato <ysato@users.sourceforge.jp>

	* gdb.texinfo (Standard Target Features): Add RX Features sub-section.

3 files changed, 156 insertions, 0 deletions

diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 0c84faf..2b65d46 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -161,6 +161,7 @@ XMLTOC = \
 	rs6000/powerpc-vsx64.xml \
 	rs6000/powerpc-vsx64l.xml \
 	rs6000/rs6000.xml \
+	rx.xml \
 	s390-linux32.xml \
 	s390-linux32v1.xml \
 	s390-linux32v2.xml \
@@ -238,6 +239,7 @@ FEATURE_XMLFILES = aarch64-core.xml \
 	riscv/64bit-cpu.xml \
 	riscv/64bit-csr.xml \
 	riscv/64bit-fpu.xml \
+	rx.xml \
 	tic6x-c6xp.xml \
 	tic6x-core.xml \
 	tic6x-gp.xml
diff --git a/gdb/features/rx.c b/gdb/features/rx.c
new file mode 100644
index 0000000..d2c29c1
--- /dev/null
+++ b/gdb/features/rx.c
@@ -0,0 +1,80 @@
+/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
+  Original: rx.xml.tmp */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_rx;
+static void
+initialize_tdesc_rx (void)
+{
+  struct target_desc *result = allocate_target_description ();
+  struct tdesc_feature *feature;
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.rx.core");
+  tdesc_type_with_fields *type_with_fields;
+  type_with_fields = tdesc_create_flags (feature, "psw_flags", 4);
+  tdesc_add_flag (type_with_fields, 0, "C");
+  tdesc_add_flag (type_with_fields, 1, "Z");
+  tdesc_add_flag (type_with_fields, 2, "S");
+  tdesc_add_flag (type_with_fields, 3, "O");
+  tdesc_add_flag (type_with_fields, 16, "I");
+  tdesc_add_flag (type_with_fields, 17, "U");
+  tdesc_add_flag (type_with_fields, 20, "PM");
+  tdesc_add_flag (type_with_fields, 24, "IPL0");
+  tdesc_add_flag (type_with_fields, 25, "IPL1");
+  tdesc_add_flag (type_with_fields, 26, "IPL2");
+  tdesc_add_flag (type_with_fields, 27, "IPL3");
+
+  type_with_fields = tdesc_create_flags (feature, "fpsw_flags", 4);
+  tdesc_add_flag (type_with_fields, 0, "RM0");
+  tdesc_add_flag (type_with_fields, 1, "RM1");
+  tdesc_add_flag (type_with_fields, 2, "CV");
+  tdesc_add_flag (type_with_fields, 3, "CO");
+  tdesc_add_flag (type_with_fields, 4, "CZ");
+  tdesc_add_flag (type_with_fields, 5, "CU");
+  tdesc_add_flag (type_with_fields, 6, "CX");
+  tdesc_add_flag (type_with_fields, 7, "CE");
+  tdesc_add_flag (type_with_fields, 8, "DN");
+  tdesc_add_flag (type_with_fields, 10, "EV");
+  tdesc_add_flag (type_with_fields, 11, "EO");
+  tdesc_add_flag (type_with_fields, 12, "EZ");
+  tdesc_add_flag (type_with_fields, 13, "EU");
+  tdesc_add_flag (type_with_fields, 14, "EX");
+  tdesc_add_flag (type_with_fields, 26, "FV");
+  tdesc_add_flag (type_with_fields, 27, "FO");
+  tdesc_add_flag (type_with_fields, 28, "FZ");
+  tdesc_add_flag (type_with_fields, 29, "FU");
+  tdesc_add_flag (type_with_fields, 30, "FX");
+  tdesc_add_flag (type_with_fields, 31, "FS");
+
+  tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "data_ptr");
+  tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
+  tdesc_create_reg (feature, "usp", 16, 1, NULL, 32, "data_ptr");
+  tdesc_create_reg (feature, "isp", 17, 1, NULL, 32, "data_ptr");
+  tdesc_create_reg (feature, "psw", 18, 1, NULL, 32, "psw_flags");
+  tdesc_create_reg (feature, "pc", 19, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "intb", 20, 1, NULL, 32, "data_ptr");
+  tdesc_create_reg (feature, "bpsw", 21, 1, NULL, 32, "psw_flags");
+  tdesc_create_reg (feature, "bpc", 22, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "fintv", 23, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "fpsw", 24, 1, NULL, 32, "fpsw_flags");
+  tdesc_create_reg (feature, "acc", 25, 1, NULL, 64, "uint64");
+
+  tdesc_rx = result;
+}
diff --git a/gdb/features/rx.xml b/gdb/features/rx.xml
new file mode 100644
index 0000000..597f929
--- /dev/null
+++ b/gdb/features/rx.xml
@@ -0,0 +1,74 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2019 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.rx.core">
+  <reg name="r0" bitsize="32" type="data_ptr"/>
+  <reg name="r1" bitsize="32" type="uint32"/>
+  <reg name="r2" bitsize="32" type="uint32"/>
+  <reg name="r3" bitsize="32" type="uint32"/>
+  <reg name="r4" bitsize="32" type="uint32"/>
+  <reg name="r5" bitsize="32" type="uint32"/>
+  <reg name="r6" bitsize="32" type="uint32"/>
+  <reg name="r7" bitsize="32" type="uint32"/>
+  <reg name="r8" bitsize="32" type="uint32"/>
+  <reg name="r9" bitsize="32" type="uint32"/>
+  <reg name="r10" bitsize="32" type="uint32"/>
+  <reg name="r11" bitsize="32" type="uint32"/>
+  <reg name="r12" bitsize="32" type="uint32"/>
+  <reg name="r13" bitsize="32" type="uint32"/>
+  <reg name="r14" bitsize="32" type="uint32"/>
+  <reg name="r15" bitsize="32" type="uint32"/>
+
+  <flags id="psw_flags" size="4">
+    <field name="C" start="0" end="0"/>
+    <field name="Z" start="1" end="1"/>
+    <field name="S" start="2" end="2"/>
+    <field name="O" start="3" end="3"/>
+    <field name="I" start="16" end="16"/>
+    <field name="U" start="17" end="17"/>
+    <field name="PM" start="20" end="20"/>
+    <field name="IPL0" start="24" end="24"/>
+    <field name="IPL1" start="25" end="25"/>
+    <field name="IPL2" start="26" end="26"/>
+    <field name="IPL3" start="27" end="27"/>
+  </flags>
+
+  <flags id="fpsw_flags" size="4">
+    <field name="RM0" start="0" end="0"/>
+    <field name="RM1" start="1" end="1"/>
+    <field name="CV" start="2" end="2"/>
+    <field name="CO" start="3" end="3"/>
+    <field name="CZ" start="4" end="4"/>
+    <field name="CU" start="5" end="5"/>
+    <field name="CX" start="6" end="6"/>
+    <field name="CE" start="7" end="7"/>
+    <field name="DN" start="8" end="8"/>
+    <field name="EV" start="10" end="10"/>
+    <field name="EO" start="11" end="11"/>
+    <field name="EZ" start="12" end="12"/>
+    <field name="EU" start="13" end="13"/>
+    <field name="EX" start="14" end="14"/>
+    <field name="FV" start="26" end="26"/>
+    <field name="FO" start="27" end="27"/>
+    <field name="FZ" start="28" end="28"/>
+    <field name="FU" start="29" end="29"/>
+    <field name="FX" start="30" end="30"/>
+    <field name="FS" start="31" end="31"/>
+  </flags>
+
+  <reg name="usp" bitsize="32" type="data_ptr"/>
+  <reg name="isp" bitsize="32" type="data_ptr"/>
+  <reg name="psw" bitsize="32" type="psw_flags"/>
+  <reg name="pc" bitsize="32" type="code_ptr"/>
+  <reg name="intb" bitsize="32" type="data_ptr"/>
+  <reg name="bpsw" bitsize="32" type="psw_flags"/>
+  <reg name="bpc" bitsize="32" type="code_ptr"/>
+  <reg name="fintv" bitsize="32" type="code_ptr"/>
+  <reg name="fpsw" bitsize="32" type="fpsw_flags"/>
+  <reg name="acc" bitsize="64" type="uint64"/>
+</feature>