Ravenscar port for RISC-V

This adds Ravenscar support to gdb for RISC-V targets.

This was tested internally using AdaCore's test suite and qemu.

gdb/ChangeLog
2019-12-12  Tom Tromey  <tromey@adacore.com>

	* Makefile.in (ALL_TARGET_OBS): Add riscv-ravenscar-thread.o.
	(HFILES_NO_SRCDIR): Add riscv-ravenscar-thread.h.
	(ALLDEPFILES): Add riscv-ravenscar-thread.c.
	* configure.tgt (riscv-*-*): Add riscv-ravenscar-thread.o.
	* riscv-ravenscar-thread.c: New file.
	* riscv-ravenscar-thread.h: New file.
	* riscv-tdep.c (riscv_gdbarch_init): Call
	register_riscv_ravenscar_ops.

Change-Id: Ic47a3b3cfbbe80c2c82a5f48d2e0481845cac8b0

1 files changed, 2 insertions, 1 deletions

diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index caa42be..b3717c7 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -85,7 +85,8 @@ ia64*-*-*)
 	;;
 
 riscv*-*-*)
-	cpu_obs="riscv-tdep.o arch/riscv.o";;
+	cpu_obs="riscv-tdep.o arch/riscv.o \
+	         ravenscar-thread.o riscv-ravenscar-thread.o";;
 
 x86_64-*-*)
 	cpu_obs="${i386_tobjs} ${amd64_tobjs}";;