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| author | Nick Clifton <nickc@redhat.com> | 2010-11-23 17:04:13 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2010-11-23 17:04:13 +0000 |
| commit | d051516a87f6581ef1355f0da631c51eb38c24f6 (patch) | |
| tree | 0a040a8f3452c9e4fc09539191c1084291d1a76f /gas | |
| parent | 731caf761016399cc3dc9517781e328c54a8e9d6 (diff) | |
| download | gdb-d051516a87f6581ef1355f0da631c51eb38c24f6.zip gdb-d051516a87f6581ef1355f0da631c51eb38c24f6.tar.gz gdb-d051516a87f6581ef1355f0da631c51eb38c24f6.tar.bz2 | |
* mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
(INSN_LOONGSON_3A): Clear bit 31.
* elfxx-mips.c (mips_set_isa_flags): Move bfd_mach_loongson_3a
after bfd_mach_mips_sb1.
* config/tc-mips.c (mips_cpu_info_table): Move loongson3a after sb1.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 3 |
2 files changed, 7 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 7b00c40..b5e005a 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,6 +1,10 @@ +2010-11-23 Mingming Sun <mingm.sun@gmail.com> + + * config/tc-mips.c (mips_cpu_info_table): Move loongson3a after sb1. + 2010-11-23 H.J. Lu <hongjiu.lu@intel.com> - * doc/as.texinfo: Refer to and include c-i386.texi for i386 + * doc/as.texinfo: Refer to and include c-i386.texi for i386 options. * doc/c-i386.texi: Add markup for use in manpage generation. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 77397bb..ac02aee 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -15358,7 +15358,6 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "5kf", 0, ISA_MIPS64, CPU_MIPS64 }, { "20kc", MIPS_CPU_ASE_MIPS3D, ISA_MIPS64, CPU_MIPS64 }, { "25kf", MIPS_CPU_ASE_MIPS3D, ISA_MIPS64, CPU_MIPS64 }, - { "loongson3a", 0, ISA_MIPS64, CPU_LOONGSON_3A }, /* Broadcom SB-1 CPU core */ { "sb1", MIPS_CPU_ASE_MIPS3D | MIPS_CPU_ASE_MDMX, @@ -15366,6 +15365,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] = /* Broadcom SB-1A CPU core */ { "sb1a", MIPS_CPU_ASE_MIPS3D | MIPS_CPU_ASE_MDMX, ISA_MIPS64, CPU_SB1 }, + + { "loongson3a", 0, ISA_MIPS64, CPU_LOONGSON_3A }, /* MIPS 64 Release 2 */ |