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author | Mike Frysinger <vapier@gentoo.org> | 2010-03-10 13:03:29 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2010-03-10 13:03:29 +0000 |
commit | a23c851aa413353ae86cc83009ad7766fd371a2d (patch) | |
tree | 3c5c81a81b8e0fc33d58b46fef2184d41909e1bb /gas | |
parent | af6b7be16a1bf716a58ef692b175725b5acb561d (diff) | |
download | gdb-a23c851aa413353ae86cc83009ad7766fd371a2d.zip gdb-a23c851aa413353ae86cc83009ad7766fd371a2d.tar.gz gdb-a23c851aa413353ae86cc83009ad7766fd371a2d.tar.bz2 |
add support for Blackfin bf504/bf506
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/config/tc-bfin.c | 6 | ||||
-rw-r--r-- | gas/doc/c-bfin.texi | 2 |
3 files changed, 15 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 9811499..1506913 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2010-03-10 Mike Frysinger <michael.frysinger@analog.com> + + * doc/c-bfin.texi (-mcpu): Add bf504 and bf506. + * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and + BFIN_CPU_BF506. + (bfin_cpus[]): Add 0.0 for bf504 and bf506. + 2010-03-10 Jie Zhang <jie@codesourcery.com> * doc/as.texinfo: Add Blackfin options. diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c index 6680f22..7d4f1cd 100644 --- a/gas/config/tc-bfin.c +++ b/gas/config/tc-bfin.c @@ -151,6 +151,8 @@ const char FLT_CHARS[] = "fFdDxX"; typedef enum bfin_cpu_type { BFIN_CPU_UNKNOWN, + BFIN_CPU_BF504, + BFIN_CPU_BF506, BFIN_CPU_BF512, BFIN_CPU_BF514, BFIN_CPU_BF516, @@ -200,6 +202,10 @@ struct bfin_cpu struct bfin_cpu bfin_cpus[] = { + {"bf504", BFIN_CPU_BF504, 0x0000, AC_05000074}, + + {"bf506", BFIN_CPU_BF506, 0x0000, AC_05000074}, + {"bf512", BFIN_CPU_BF512, 0x0001, AC_05000074}, {"bf512", BFIN_CPU_BF512, 0x0000, AC_05000074}, diff --git a/gas/doc/c-bfin.texi b/gas/doc/c-bfin.texi index e2749d3..60c3360 100644 --- a/gas/doc/c-bfin.texi +++ b/gas/doc/c-bfin.texi @@ -34,6 +34,8 @@ is not used in assembler. It's here such that GCC can easily pass down its error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized: +@code{bf504}, +@code{bf506}, @code{bf512}, @code{bf514}, @code{bf516}, |