include/opcode/

2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* mips.h (OP_*_OFFSET_A, OP_*_OFFSET_B, OP_*_OFFSET_C)
	(OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
	(INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.

opcodes/
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* mips-opc.c (WR_z, WR_Z, RD_z, RD_Z, RD_d): Define.
	(mips_builtin_opcodes): Add loongson3a specific instructions.
	* mips-dis.c (print_insn_args): Handle the new arguments +a|b|c|z|Z.

gas/
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* config/tc-mips.c (insn_uses_reg): Handle the new flags
	INSN2_READ_FPR_Z, INSN2_READ_GPR_D and INSN2_READ_GPR_Z.
	(append_insn): Handle delay-slot filling for the new flags.
	(validate_mips_insn): Handle the new arguments +a|b|c|z|Z.
	(mips_ip): Handle the new arguments +a|b|c|z|Z.

gas/testsuite/
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d,
	gas/mips/loongson-3a-3.s, gas/mips/loongson-3a-3.d: New tests.
	* gas/mips/mips.exp: Run them.

8 files changed, 261 insertions, 1 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index ca9b61d..50216fd 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2010-12-18  Mingjie Xing  <mingjie.xing@gmail.com>
+
+	* config/tc-mips.c (insn_uses_reg): Handle the new flags
+	INSN2_READ_FPR_Z, INSN2_READ_GPR_D and INSN2_READ_GPR_Z.
+	(append_insn): Handle delay-slot filling for the new flags.
+	(validate_mips_insn): Handle the new arguments +a|b|c|z|Z.
+	(mips_ip): Handle the new arguments +a|b|c|z|Z.
+
 2010-12-18  DJ Delorie  <dj@redhat.com>
 
 	* config/rx-parse.y (SUB): Correct subtraction of immediate
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 65d1989..20bf431 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -2275,6 +2275,10 @@ insn_uses_reg (const struct mips_cl_insn *ip, unsigned int reg,
 	  && ((EXTRACT_OPERAND (FT, *ip) & ~(unsigned) 1)
 	      == (reg &~ (unsigned) 1)))
 	return 1;
+      if ((ip->insn_mo->pinfo2 & INSN2_READ_FPR_Z)
+	  && ((EXTRACT_OPERAND (FZ, *ip) & ~(unsigned) 1)
+	      == (reg &~ (unsigned) 1)))
+	return 1;
     }
   else if (! mips_opts.mips16)
     {
@@ -2284,6 +2288,12 @@ insn_uses_reg (const struct mips_cl_insn *ip, unsigned int reg,
       if ((ip->insn_mo->pinfo & INSN_READ_GPR_T)
 	  && EXTRACT_OPERAND (RT, *ip) == reg)
 	return 1;
+      if ((ip->insn_mo->pinfo2 & INSN2_READ_GPR_D)
+	  && EXTRACT_OPERAND (RD, *ip) == reg)
+	return 1;
+      if ((ip->insn_mo->pinfo2 & INSN2_READ_GPR_Z)
+	  && EXTRACT_OPERAND (RZ, *ip) == reg)
+	return 1;
     }
   else
     {
@@ -2809,6 +2819,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
 	     bfd_reloc_code_real_type *reloc_type)
 {
   unsigned long prev_pinfo, pinfo;
+  unsigned long prev_pinfo2, pinfo2;
   relax_stateT prev_insn_frag_type = 0;
   bfd_boolean relaxed_branch = FALSE;
   segment_info_type *si = seg_info (now_seg);
@@ -2822,7 +2833,9 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
   file_ase_mips16 |= mips_opts.mips16;
 
   prev_pinfo = history[0].insn_mo->pinfo;
+  prev_pinfo2 = history[0].insn_mo->pinfo2;
   pinfo = ip->insn_mo->pinfo;
+  pinfo2 = ip->insn_mo->pinfo2;
 
   if (mips_relax.sequence != 2 && !mips_opts.noreorder)
     {
@@ -3162,7 +3175,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
   /* Update the register mask information.  */
   if (! mips_opts.mips16)
     {
-      if (pinfo & INSN_WRITE_GPR_D)
+      if ((pinfo & INSN_WRITE_GPR_D) || (pinfo2 & INSN2_READ_GPR_D))
 	mips_gprmask |= 1 << EXTRACT_OPERAND (RD, *ip);
       if ((pinfo & (INSN_WRITE_GPR_T | INSN_READ_GPR_T)) != 0)
 	mips_gprmask |= 1 << EXTRACT_OPERAND (RT, *ip);
@@ -3170,6 +3183,8 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
 	mips_gprmask |= 1 << EXTRACT_OPERAND (RS, *ip);
       if (pinfo & INSN_WRITE_GPR_31)
 	mips_gprmask |= 1 << RA;
+      if (pinfo2 & (INSN2_WRITE_GPR_Z | INSN2_READ_GPR_Z))
+	mips_gprmask |= 1 << EXTRACT_OPERAND (RZ, *ip);
       if (pinfo & INSN_WRITE_FPR_D)
 	mips_cprmask[1] |= 1 << EXTRACT_OPERAND (FD, *ip);
       if ((pinfo & (INSN_WRITE_FPR_S | INSN_READ_FPR_S)) != 0)
@@ -3178,6 +3193,8 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
 	mips_cprmask[1] |= 1 << EXTRACT_OPERAND (FT, *ip);
       if ((pinfo & INSN_READ_FPR_R) != 0)
 	mips_cprmask[1] |= 1 << EXTRACT_OPERAND (FR, *ip);
+      if (pinfo2 & (INSN2_WRITE_FPR_Z | INSN2_READ_FPR_Z))
+	mips_cprmask[1] |= 1 << EXTRACT_OPERAND (FZ, *ip);
       if (pinfo & INSN_COP)
 	{
 	  /* We don't keep enough information to sort these cases out.
@@ -3272,6 +3289,10 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
 		  && (prev_pinfo & INSN_WRITE_GPR_D)
 		  && insn_uses_reg (ip, EXTRACT_OPERAND (RD, history[0]),
 				    MIPS_GR_REG))
+	      || (! mips_opts.mips16
+		  && (prev_pinfo2 & INSN2_WRITE_GPR_Z)
+		  && insn_uses_reg (ip, EXTRACT_OPERAND (RZ, history[0]),
+				    MIPS_GR_REG))
 	      || (mips_opts.mips16
 		  && (((prev_pinfo & MIPS16_INSN_WRITE_X)
 		       && (insn_uses_reg
@@ -8479,6 +8500,11 @@ validate_mips_insn (const struct mips_opcode *opc)
 	  case 'Q': USE_BITS (OP_MASK_SEQI,	OP_SH_SEQI);	break;
 	  case 's': USE_BITS (OP_MASK_CINSLM1,	OP_SH_CINSLM1);	break;
 	  case 'S': USE_BITS (OP_MASK_CINSLM1,	OP_SH_CINSLM1);	break;
+	  case 'z': USE_BITS (OP_MASK_RZ,	OP_SH_RZ);	break;
+	  case 'Z': USE_BITS (OP_MASK_FZ,	OP_SH_FZ);	break;
+	  case 'a': USE_BITS (OP_MASK_OFFSET_A,	OP_SH_OFFSET_A); break;
+	  case 'b': USE_BITS (OP_MASK_OFFSET_B,	OP_SH_OFFSET_B); break;
+	  case 'c': USE_BITS (OP_MASK_OFFSET_C,	OP_SH_OFFSET_C); break;
 
 	  default:
 	    as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"),
@@ -9290,6 +9316,77 @@ mips_ip (char *str, struct mips_cl_insn *ip)
 		  s = expr_end;
 		  continue;
 
+		case 'a': /* 8-bit signed offset in bit 6 */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  min_range = -((OP_MASK_OFFSET_A + 1) >> 1);
+		  max_range = ((OP_MASK_OFFSET_A + 1) >> 1) - 1;
+		  if (imm_expr.X_add_number < min_range
+		      || imm_expr.X_add_number > max_range)
+		    {
+		      as_bad (_("immediate not in range %ld..%ld (%ld)"),
+		              (long) min_range, (long) max_range,
+		              (long) imm_expr.X_add_number);
+		    }
+		  INSERT_OPERAND (OFFSET_A, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'b': /* 8-bit signed offset in bit 3 */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  min_range = -((OP_MASK_OFFSET_B + 1) >> 1);
+		  max_range = ((OP_MASK_OFFSET_B + 1) >> 1) - 1;
+		  if (imm_expr.X_add_number < min_range
+		      || imm_expr.X_add_number > max_range)
+		    {
+		      as_bad (_("immediate not in range %ld..%ld (%ld)"),
+		              (long) min_range, (long) max_range,
+		              (long) imm_expr.X_add_number);
+		    }
+		  INSERT_OPERAND (OFFSET_B, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'c': /* 9-bit signed offset in bit 6 */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  min_range = -((OP_MASK_OFFSET_C + 1) >> 1);
+		  max_range = ((OP_MASK_OFFSET_C + 1) >> 1) - 1;
+		  if (imm_expr.X_add_number < min_range
+		      || imm_expr.X_add_number > max_range)
+		    {
+		      as_bad (_("immediate not in range %ld..%ld (%ld)"),
+		              (long) min_range, (long) max_range,
+		              (long) imm_expr.X_add_number);
+		    }
+		  INSERT_OPERAND (OFFSET_C, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'z':
+		  if (!reg_lookup (&s, RTYPE_NUM | RTYPE_GP, &regno))
+		    break;
+		  if (regno == AT && mips_opts.at)
+		    {
+		      if (mips_opts.at == ATREG)
+			as_warn (_("used $at without \".set noat\""));
+		      else
+			as_warn (_("used $%u with \".set at=$%u\""),
+				 regno, mips_opts.at);
+		    }
+		  INSERT_OPERAND (RZ, *ip, regno);
+		  continue;
+
+		case 'Z':
+		  if (!reg_lookup (&s, RTYPE_FPU, &regno))
+		    break;
+		  INSERT_OPERAND (FZ, *ip, regno);
+		  continue;
+
 		default:
 		  as_bad (_("Internal error: bad mips opcode "
 			    "(unknown extension operand type `+%c'): %s %s"),
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 8592bf0..0cf93d6 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2010-12-18  Mingjie Xing  <mingjie.xing@gmail.com>
+
+	* gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d,
+	gas/mips/loongson-3a-3.s, gas/mips/loongson-3a-3.d: New tests.
+	* gas/mips/mips.exp: Run them.
+
 2010-12-12  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/elf/elf.exp: Run section9.
diff --git a/gas/testsuite/gas/mips/loongson-3a-2.d b/gas/testsuite/gas/mips/loongson-3a-2.d
new file mode 100644
index 0000000..4029a60
--- /dev/null
+++ b/gas/testsuite/gas/mips/loongson-3a-2.d
@@ -0,0 +1,65 @@
+#as: -march=loongson3a -mabi=o64
+#objdump: -M reg-names=numeric -dr
+#name: Loongson-3A tests
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.text>:
+.*:	70601075 	campi	\$2,\$3
+.*:	70a02035 	campv	\$4,\$5
+.*:	70e830b5 	camwi	\$6,\$7,\$8
+.*:	714048f5 	ramri	\$9,\$10
+.*:	716c0026 	gsle	\$11,\$12
+.*:	71ae0027 	gsgt	\$13,\$14
+.*:	c8622010 	gslble	\$2,\$3,\$4
+.*:	c8c53811 	gslbgt	\$5,\$6,\$7
+.*:	c9285012 	gslhle	\$8,\$9,\$10
+.*:	c98b6813 	gslhgt	\$11,\$12,\$13
+.*:	c9ee8014 	gslwle	\$14,\$15,\$16
+.*:	ca519815 	gslwgt	\$17,\$18,\$19
+.*:	cab4b016 	gsldle	\$20,\$21,\$22
+.*:	cb17c817 	gsldgt	\$23,\$24,\$25
+.*:	e8622010 	gssble	\$2,\$3,\$4
+.*:	e8c53811 	gssbgt	\$5,\$6,\$7
+.*:	e9285012 	gsshle	\$8,\$9,\$10
+.*:	e98b6813 	gsshgt	\$11,\$12,\$13
+.*:	e9ee8014 	gsswle	\$14,\$15,\$16
+.*:	ea519815 	gsswgt	\$17,\$18,\$19
+.*:	eab4b016 	gssdle	\$20,\$21,\$22
+.*:	eb17c817 	gssdgt	\$23,\$24,\$25
+.*:	c8401818 	gslwlec1	\$f0,\$2,\$3
+.*:	c8812819 	gslwgtc1	\$f1,\$4,\$5
+.*:	c8c2381a 	gsldlec1	\$f2,\$6,\$7
+.*:	c903481b 	gsldgtc1	\$f3,\$8,\$9
+.*:	e944581c 	gsswlec1	\$f4,\$10,\$11
+.*:	e985681d 	gsswgtc1	\$f5,\$12,\$13
+.*:	e9c6781e 	gssdlec1	\$f6,\$14,\$15
+.*:	ea07881f 	gssdgtc1	\$f7,\$16,\$17
+.*:	ca480004 	gslwlc1	\$f8,0\(\$18\)
+.*:	ca690045 	gslwrc1	\$f9,1\(\$19\)
+.*:	ca8a0086 	gsldlc1	\$f10,2\(\$20\)
+.*:	caab00c7 	gsldrc1	\$f11,3\(\$21\)
+.*:	eacc0104 	gsswlc1	\$f12,4\(\$22\)
+.*:	eaed0145 	gsswrc1	\$f13,5\(\$23\)
+.*:	eb0e0186 	gssdlc1	\$f14,6\(\$24\)
+.*:	eb2f01c7 	gssdrc1	\$f15,7\(\$25\)
+.*:	d8622000 	gslbx	\$2,0\(\$3,\$4\)
+.*:	d8c53ff9 	gslhx	\$5,-1\(\$6,\$7\)
+.*:	d92857f2 	gslwx	\$8,-2\(\$9,\$10\)
+.*:	d98b6feb 	gsldx	\$11,-3\(\$12,\$13\)
+.*:	f9ee87e0 	gssbx	\$14,-4\(\$15,\$16\)
+.*:	fa519fd9 	gsshx	\$17,-5\(\$18,\$19\)
+.*:	fab4b7d2 	gsswx	\$20,-6\(\$21,\$22\)
+.*:	fb17cfcb 	gssdx	\$23,-7\(\$24,\$25\)
+.*:	d8501bfe 	gslwxc1	\$f16,127\(\$2,\$3\)
+.*:	d8912c07 	gsldxc1	\$f17,-128\(\$4,\$5\)
+.*:	f8d23bfe 	gsswxc1	\$f18,127\(\$6,\$7\)
+.*:	f9134c07 	gssdxc1	\$f19,-128\(\$8,\$9\)
+.*:	c98b3fea 	gslq	\$10,\$11,255\(\$12\)
+.*:	e9ee402d 	gssq	\$13,\$14,-256\(\$15\)
+.*:	ca15bff4 	gslqc1	\$f20,\$f21,255\(\$16\)
+.*:	ea37c036 	gssqc1	\$f22,\$f23,-256\(\$17\)
+#pass
+
diff --git a/gas/testsuite/gas/mips/loongson-3a-2.s b/gas/testsuite/gas/mips/loongson-3a-2.s
new file mode 100644
index 0000000..16a38c9
--- /dev/null
+++ b/gas/testsuite/gas/mips/loongson-3a-2.s
@@ -0,0 +1,65 @@
+	.text

+	.set noreorder

+

+	campi		$2,$3

+	campv		$4,$5

+	camwi		$6,$7,$8

+	ramri		$9,$10

+

+	gsle		$11,$12

+	gsgt		$13,$14

+

+	gslble		$2,$3,$4

+	gslbgt		$5,$6,$7

+	gslhle		$8,$9,$10

+	gslhgt		$11,$12,$13

+	gslwle		$14,$15,$16

+	gslwgt		$17,$18,$19

+	gsldle		$20,$21,$22

+	gsldgt		$23,$24,$25

+	gssble		$2,$3,$4

+	gssbgt		$5,$6,$7

+	gsshle		$8,$9,$10

+	gsshgt		$11,$12,$13

+	gsswle		$14,$15,$16

+	gsswgt		$17,$18,$19

+	gssdle		$20,$21,$22

+	gssdgt		$23,$24,$25

+

+	gslwlec1	$f0,$2,$3        

+	gslwgtc1	$f1,$4,$5  

+	gsldlec1	$f2,$6,$7  

+	gsldgtc1	$f3,$8,$9  

+	gsswlec1	$f4,$10,$11  

+	gsswgtc1	$f5,$12,$13

+	gssdlec1	$f6,$14,$15

+	gssdgtc1	$f7,$16,$17

+

+	gslwlc1		$f8,0($18)

+	gslwrc1		$f9,1($19) 

+	gsldlc1		$f10,2($20) 

+	gsldrc1		$f11,3($21)

+	gsswlc1		$f12,4($22)

+	gsswrc1		$f13,5($23)

+	gssdlc1		$f14,6($24)

+	gssdrc1		$f15,7($25)

+

+	gslbx		$2,0($3,$4)

+	gslhx		$5,-1($6,$7)

+	gslwx		$8,-2($9,$10)

+	gsldx		$11,-3($12,$13)

+	gssbx		$14,-4($15,$16)

+	gsshx		$17,-5($18,$19)

+	gsswx		$20,-6($21,$22)

+	gssdx		$23,-7($24,$25)

+

+	gslwxc1		$f16,127($2,$3)

+	gsldxc1		$f17,-128($4,$5)

+	gsswxc1		$f18,127($6,$7)

+	gssdxc1		$f19,-128($8,$9)

+

+	gslq		$10,$11,255($12) 

+	gssq		$13,$14,-256($15)

+	gslqc1		$f20,$f21,255($16)

+	gssqc1		$f22,$f23,-256($17)

+

diff --git a/gas/testsuite/gas/mips/loongson-3a-3.d b/gas/testsuite/gas/mips/loongson-3a-3.d
new file mode 100644
index 0000000..e242c5d
--- /dev/null
+++ b/gas/testsuite/gas/mips/loongson-3a-3.d
@@ -0,0 +1,13 @@
+#as: -march=loongson3a -mabi=o64
+#objdump: -M reg-names=numeric -dr
+#name: Loongson delay slot tests
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.text>:
+.*:	c8c50024 	gslq	\$4,\$5,0\(\$6\)
+.*:	10800002 	beqz	\$4,0x10
+.*:	00000000 	nop
+#pass
diff --git a/gas/testsuite/gas/mips/loongson-3a-3.s b/gas/testsuite/gas/mips/loongson-3a-3.s
new file mode 100644
index 0000000..24f427b
--- /dev/null
+++ b/gas/testsuite/gas/mips/loongson-3a-3.s
@@ -0,0 +1,4 @@
+       gslq $4,$5,0($6)
+       beq  $4,$0,1f
+       nop
+1:
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index baea397..056dd75 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -916,6 +916,8 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "loongson-2f-3"
 
     run_dump_test "loongson-3a"
+    run_dump_test "loongson-3a-2"
+    run_dump_test "loongson-3a-3"
 
     run_dump_test_arches "octeon"	[mips_arch_list_matching octeon]
     run_list_test_arches "octeon-ill" "" \