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authorJason Eckhardt <jle@rice.edu>2003-08-07 04:05:42 +0000
committerJason Eckhardt <jle@rice.edu>2003-08-07 04:05:42 +0000
commit820aff5582fe3441158635c80985ae2054ef390e (patch)
treec5f7fe33b23b7687e253046be5a7e648ddcc129a /gas
parentdcd81ce97cf3e474fd276265df01984e257f48fd (diff)
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2003-08-01 Jason Eckhardt <jle@rice.edu>
* config/tc-i860.c (s_align_wrapper): New function and prototype. (md_pseudo_table): Change s_align_bytes to s_align_wrapper, remove surrounding OBJ_ELF ifdef, and re-format slightly. * doc/c-i860.texi: Document the special .align syntax available in Intel mode.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog8
-rw-r--r--gas/config/tc-i860.c46
-rw-r--r--gas/doc/c-i860.texi6
3 files changed, 53 insertions, 7 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index bbb0d78..34e8800 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,13 @@
2003-08-06 Jason Eckhardt <jle@rice.edu>
+ * config/tc-i860.c (s_align_wrapper): New function and prototype.
+ (md_pseudo_table): Change s_align_bytes to s_align_wrapper, remove
+ surrounding OBJ_ELF ifdef, and re-format slightly.
+ * doc/c-i860.texi: Document the special .align syntax available
+ in Intel mode.
+
+2003-08-06 Jason Eckhardt <jle@rice.edu>
+
* config/tc-i860.c (i860_handle_align): New function.
* config/tc-i860.h (HANDLE_ALIGN): Define macro.
(MAX_MEM_FOR_RS_ALIGN_CODE): Define macro.
diff --git a/gas/config/tc-i860.c b/gas/config/tc-i860.c
index b281d52..f5e4457 100644
--- a/gas/config/tc-i860.c
+++ b/gas/config/tc-i860.c
@@ -91,6 +91,7 @@ static void i860_process_insn (char *);
static void s_dual (int);
static void s_enddual (int);
static void s_atmp (int);
+static void s_align_wrapper (int);
static int i860_get_expression (char *);
static bfd_reloc_code_real_type obtain_reloc_for_imm16 (fixS *, long *);
#ifdef DEBUG_I860
@@ -99,13 +100,11 @@ static void print_insn (struct i860_it *);
const pseudo_typeS md_pseudo_table[] =
{
-#ifdef OBJ_ELF
- {"align", s_align_bytes, 0},
-#endif
- {"dual", s_dual, 0},
- {"enddual", s_enddual, 0},
- {"atmp", s_atmp, 0},
- {NULL, 0, 0},
+ {"align", s_align_wrapper, 0},
+ {"dual", s_dual, 0},
+ {"enddual", s_enddual, 0},
+ {"atmp", s_atmp, 0},
+ {NULL, 0, 0},
};
/* Dual-instruction mode handling. */
@@ -176,6 +175,39 @@ s_atmp (int ignore ATTRIBUTE_UNUSED)
demand_empty_rest_of_line ();
}
+/* Handle ".align" directive depending on syntax mode.
+ AT&T/SVR4 syntax uses the standard align directive. However,
+ the Intel syntax additionally allows keywords for the alignment
+ parameter: ".align type", where type is one of {.short, .long,
+ .quad, .single, .double} representing alignments of 2, 4,
+ 16, 4, and 8, respectively. */
+static void
+s_align_wrapper (int arg)
+{
+ char *parm = input_line_pointer;
+
+ if (target_intel_syntax)
+ {
+ /* Replace a keyword with the equivalent integer so the
+ standard align routine can parse the directive. */
+ if (strncmp (parm, ".short", 6) == 0)
+ strncpy (parm, " 2", 6);
+ else if (strncmp (parm, ".long", 5) == 0)
+ strncpy (parm, " 4", 5);
+ else if (strncmp (parm, ".quad", 5) == 0)
+ strncpy (parm, " 16", 5);
+ else if (strncmp (parm, ".single", 7) == 0)
+ strncpy (parm, " 4", 7);
+ else if (strncmp (parm, ".double", 7) == 0)
+ strncpy (parm, " 8", 7);
+
+ while (*input_line_pointer == ' ')
+ ++input_line_pointer;
+ }
+
+ s_align_bytes (arg);
+}
+
/* This function is called once, at assembler startup time. It should
set up all the tables and data structures that the MD part of the
assembler will need. */
diff --git a/gas/doc/c-i860.texi b/gas/doc/c-i860.texi
index 118fe34..79decb2 100644
--- a/gas/doc/c-i860.texi
+++ b/gas/doc/c-i860.texi
@@ -106,6 +106,12 @@ default register is @code{r31}.
The @code{.dual}, @code{.enddual}, and @code{.atmp} directives are available only in the Intel syntax mode.
+Both syntaxes allow for the standard @code{.align} directive. However,
+the Intel syntax additionally allows keywords for the alignment
+parameter: "@code{.align type}", where `type' is one of @code{.short}, @code{.long},
+@code{.quad}, @code{.single}, @code{.double} representing alignments of 2, 4,
+16, 4, and 8, respectively.
+
@node Opcodes for i860
@section i860 Opcodes