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authorH.J. Lu <hjl.tools@gmail.com>2018-01-08 04:36:59 -0800
committerH.J. Lu <hjl.tools@gmail.com>2018-01-08 04:37:20 -0800
commit704a705d7aaab8041df76e2981e2a1efc014aad0 (patch)
tree8792c8a27852863446dabab83c4fc53e558a24a4 /gas
parent605fd3c6590fbed834107a2e1d1df0ba58834576 (diff)
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x86: Properly encode vmovd with 64-bit memeory
For historical reason, we allow movd/vmovd with 64-bit register and memeory operands. But for vmovd, we failed to handle 64-bit memeory operand. This has been gone unnoticed since AT&T syntax always treats memory operand as 32-bit memory. This patch properly encodes vmovd with 64-bit memeory operands. It also removes AVX512 vmovd with 64-bit operands since GCC has case TYPE_SSEMOV: switch (get_attr_mode (insn)) { case MODE_DI: /* Handle broken assemblers that require movd instead of movq. */ if (!HAVE_AS_IX86_INTERUNIT_MOVQ && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))) return "%vmovd\t{%1, %0|%0, %1}"; return "%vmovq\t{%1, %0|%0, %1}"; and all AVX512 GNU assemblers set HAVE_AS_IX86_INTERUNIT_MOVQ, GCC won't generate AVX512 vmovd with 64-bit operand. gas/ PR gas/22681 * testsuite/gas/i386/i386.exp: Run x86-64-movd and x86-64-movd-intel. * testsuite/gas/i386/x86-64-movd-intel.d: New file. * testsuite/gas/i386/x86-64-movd.d: Likewise. * testsuite/gas/i386/x86-64-movd.s: Likewise. opcodes/ PR gas/22681 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand. Remove AVX512 vmovd with 64-bit operands. * i386-tbl.h: Regenerated.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog9
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/x86-64-movd-intel.d47
-rw-r--r--gas/testsuite/gas/i386/x86-64-movd.d46
-rw-r--r--gas/testsuite/gas/i386/x86-64-movd.s41
5 files changed, 145 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index d3ad1a4..33428a2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22681
+ * testsuite/gas/i386/i386.exp: Run x86-64-movd and
+ x86-64-movd-intel.
+ * testsuite/gas/i386/x86-64-movd-intel.d: New file.
+ * testsuite/gas/i386/x86-64-movd.d: Likewise.
+ * testsuite/gas/i386/x86-64-movd.s: Likewise.
+
2018-01-08 Nick Clifton <nickc@redhat.com>
PR 22553
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 3fd0e46..20bcf91 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -900,6 +900,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-notrack"
run_dump_test "x86-64-notrack-intel"
run_list_test "x86-64-notrackbad" "-al"
+ run_dump_test "x86-64-movd"
+ run_dump_test "x86-64-movd-intel"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-movd-intel.d b/gas/testsuite/gas/i386/x86-64-movd-intel.d
new file mode 100644
index 0000000..fe99f62
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movd-intel.d
@@ -0,0 +1,47 @@
+#source: x86-64-movd.s
+#as: -J
+#objdump: -dw -Mintel
+#name: x86-64 movd (Intel mode)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 66 48 0f 6e c8 movq xmm1,rax
+ +[a-f0-9]+: 66 0f 7e 88 80 00 00 00 movd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 66 48 0f 7e c8 movq rax,xmm1
+ +[a-f0-9]+: c5 f9 6e 88 80 00 00 00 vmovd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: c4 e1 f9 6e c8 vmovq xmm1,rax
+ +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: c4 e1 f9 7e c8 vmovq rax,xmm1
+ +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 66 0f 6e c8 movd xmm1,eax
+ +[a-f0-9]+: 66 0f 7e 88 80 00 00 00 movd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 66 0f 7e 88 80 00 00 00 movd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 66 0f 7e c8 movd eax,xmm1
+ +[a-f0-9]+: 66 48 0f 6e 88 80 00 00 00 movq xmm1,QWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 66 48 0f 6e c8 movq xmm1,rax
+ +[a-f0-9]+: 66 48 0f 7e 88 80 00 00 00 movq QWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 66 48 0f 7e c8 movq rax,xmm1
+ +[a-f0-9]+: c5 f9 6e 88 80 00 00 00 vmovd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: c5 f9 6e 88 80 00 00 00 vmovd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: c5 f9 6e c8 vmovd xmm1,eax
+ +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: c5 f9 7e c8 vmovd eax,xmm1
+ +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd xmm1,DWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: 62 f1 7d 08 6e c8 vmovd xmm1,eax
+ +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd DWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: 62 f1 7d 08 7e c8 vmovd eax,xmm1
+ +[a-f0-9]+: c4 e1 f9 6e 88 80 00 00 00 vmovq xmm1,QWORD PTR \[rax\+0x80\]
+ +[a-f0-9]+: c4 e1 f9 6e c8 vmovq xmm1,rax
+ +[a-f0-9]+: c4 e1 f9 7e 88 80 00 00 00 vmovq QWORD PTR \[rax\+0x80\],xmm1
+ +[a-f0-9]+: c4 e1 f9 7e c8 vmovq rax,xmm1
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-movd.d b/gas/testsuite/gas/i386/x86-64-movd.d
new file mode 100644
index 0000000..5d4a6c6
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movd.d
@@ -0,0 +1,46 @@
+#as: -J
+#objdump: -dw
+#name: x86-64 movd
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+ +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 66 48 0f 6e c8 movq %rax,%xmm1
+ +[a-f0-9]+: 66 0f 7e 88 80 00 00 00 movd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 66 48 0f 7e c8 movq %xmm1,%rax
+ +[a-f0-9]+: c5 f9 6e 88 80 00 00 00 vmovd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: c4 e1 f9 6e c8 vmovq %rax,%xmm1
+ +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: c4 e1 f9 7e c8 vmovq %xmm1,%rax
+ +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 66 0f 6e c8 movd %eax,%xmm1
+ +[a-f0-9]+: 66 0f 7e 88 80 00 00 00 movd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 66 0f 7e 88 80 00 00 00 movd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 66 0f 7e c8 movd %xmm1,%eax
+ +[a-f0-9]+: 66 48 0f 6e 88 80 00 00 00 movq 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 66 48 0f 6e c8 movq %rax,%xmm1
+ +[a-f0-9]+: 66 48 0f 7e 88 80 00 00 00 movq %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 66 48 0f 7e c8 movq %xmm1,%rax
+ +[a-f0-9]+: c5 f9 6e 88 80 00 00 00 vmovd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: c5 f9 6e 88 80 00 00 00 vmovd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: c5 f9 6e c8 vmovd %eax,%xmm1
+ +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: c5 f9 7e c8 vmovd %xmm1,%eax
+ +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: 62 f1 7d 08 6e c8 vmovd %eax,%xmm1
+ +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: 62 f1 7d 08 7e c8 vmovd %xmm1,%eax
+ +[a-f0-9]+: c4 e1 f9 6e 88 80 00 00 00 vmovq 0x80\(%rax\),%xmm1
+ +[a-f0-9]+: c4 e1 f9 6e c8 vmovq %rax,%xmm1
+ +[a-f0-9]+: c4 e1 f9 7e 88 80 00 00 00 vmovq %xmm1,0x80\(%rax\)
+ +[a-f0-9]+: c4 e1 f9 7e c8 vmovq %xmm1,%rax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-movd.s b/gas/testsuite/gas/i386/x86-64-movd.s
new file mode 100644
index 0000000..1722cef
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-movd.s
@@ -0,0 +1,41 @@
+# Check movd/vmovd with memory and register.
+
+ .text
+_start:
+ movd 128(%rax), %xmm1
+ movd %rax, %xmm1
+ movd %xmm1, 128(%rax)
+ movd %xmm1, %rax
+ vmovd 128(%rax), %xmm1
+ vmovd %rax, %xmm1
+ vmovd %xmm1, 128(%rax)
+ vmovd %xmm1, %rax
+ {evex} vmovd 128(%rax), %xmm1
+ {evex} vmovd %xmm1, 128(%rax)
+ .intel_syntax noprefix
+ movd xmm1, [rax + 128]
+ movd xmm1, dword ptr [rax + 128]
+ movd xmm1, eax
+ movd dword ptr [rax + 128], xmm1
+ movd [rax + 128], xmm1
+ movd eax, xmm1
+ movd xmm1, qword ptr [rax + 128]
+ movd xmm1, rax
+ movd qword ptr [rax + 128], xmm1
+ movd rax, xmm1
+ vmovd xmm1, dword ptr [rax + 128]
+ vmovd xmm1, [rax + 128]
+ vmovd xmm1, eax
+ vmovd dword ptr [rax + 128], xmm1
+ vmovd [rax + 128], xmm1
+ vmovd eax, xmm1
+ {evex} vmovd xmm1, dword ptr [rax + 128]
+ {evex} vmovd xmm1, [rax + 128]
+ {evex} vmovd xmm1, eax
+ {evex} vmovd dword ptr [rax + 128], xmm1
+ {evex} vmovd [rax + 128], xmm1
+ {evex} vmovd eax, xmm1
+ vmovd xmm1, qword ptr [rax + 128]
+ vmovd xmm1, rax
+ vmovd qword ptr [rax + 128], xmm1
+ vmovd rax, xmm1