X86: Add ptwrite instruction

Implement ptwrite instruction defined in Intel64 and IA-32 Architectures
Software Developer’s Manual, June 2016.

gas/

	* config/tc-i386.c (cpu_arch): Add .ptwrite.
	* doc/c-i386.texi: Document ptwrite and .ptwrite.
	* testsuite/gas/i386/i386.exp: Run ptwrite, ptwrite-intel,
	x86-64-ptwrite and x86-64-ptwrite-intel.
	* testsuite/gas/i386/ptwrite-intel.d: New file.
	* testsuite/gas/i386/ptwrite.d: Likewise.
	* testsuite/gas/i386/ptwrite.s: Likewise.
	* testsuite/gas/i386/x86-64-ptwrite-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-ptwrite.d: Likewise.
	* testsuite/gas/i386/x86-64-ptwrite.s: Likewise.

opcodes/

	* i386-dis.c (PREFIX_MOD_0_0FAE_REG_4): New.
	(PREFIX_MOD_3_0FAE_REG_4): Likewise.
	(prefix_table): Add PREFIX_MOD_0_0FAE_REG_4 and
	PREFIX_MOD_3_0FAE_REG_4.
	(mod_table): Use PREFIX_MOD_0_0FAE_REG_4 and
	PREFIX_MOD_3_0FAE_REG_4.
	* i386-gen.c (cpu_flag_init): Add CPU_PTWRITE_FLAGS.
	(cpu_flags): Add CpuPTWRITE.
	* i386-opc.h (CpuPTWRITE): New.
	(i386_cpu_flags): Add cpuptwrite.
	* i386-opc.tbl: Add ptwrite instruction.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

10 files changed, 132 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1744cf8..b66e975 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,16 @@
+2016-08-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add .ptwrite.
+	* doc/c-i386.texi: Document ptwrite and .ptwrite.
+	* testsuite/gas/i386/i386.exp: Run ptwrite, ptwrite-intel,
+	x86-64-ptwrite and x86-64-ptwrite-intel.
+	* testsuite/gas/i386/ptwrite-intel.d: New file.
+	* testsuite/gas/i386/ptwrite.d: Likewise.
+	* testsuite/gas/i386/ptwrite.s: Likewise.
+	* testsuite/gas/i386/x86-64-ptwrite-intel.d: Likewise.
+	* testsuite/gas/i386/x86-64-ptwrite.d: Likewise.
+	* testsuite/gas/i386/x86-64-ptwrite.s: Likewise.
+
 2016-08-19  Tamar Christina  <tamar.christina@arm.com>
 
 	* config/tc-arm.c (do_co_reg2c): Added constraint.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index a3b85c8..626f7bf 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -972,6 +972,8 @@ static const arch_entry cpu_arch[] =
     CPU_OSPKE_FLAGS, 0 },
   { STRING_COMMA_LEN (".rdpid"), PROCESSOR_UNKNOWN,
     CPU_RDPID_FLAGS, 0 },
+  { STRING_COMMA_LEN (".ptwrite"), PROCESSOR_UNKNOWN,
+    CPU_PTWRITE_FLAGS, 0 },
 };
 
 static const noarch_entry cpu_noarch[] =
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 30e29f6..5e9e2ef 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -166,6 +166,7 @@ accept various extension mnemonics.  For example,
 @code{mpx},
 @code{sha},
 @code{rdpid},
+@code{ptwrite},
 @code{prefetchwt1},
 @code{clflushopt},
 @code{se1},
@@ -1195,6 +1196,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
 @item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpid}
+@item @samp{.ptwrite}
 @end multitable
 
 Apart from the warning, there are only two other effects on
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 61b6b27..a546c26 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -366,6 +366,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "ospke"
     run_dump_test "rdpid"
     run_dump_test "rdpid-intel"
+    run_dump_test "ptwrite"
+    run_dump_test "ptwrite-intel"
     run_list_test "avx512vl-1" "-al"
     run_list_test "avx512vl-2" "-al"
 
@@ -767,6 +769,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-ospke"
     run_dump_test "x86-64-rdpid"
     run_dump_test "x86-64-rdpid-intel"
+    run_dump_test "x86-64-ptwrite"
+    run_dump_test "x86-64-ptwrite-intel"
     run_dump_test "x86-64-fence-as-lock-add-yes"
     run_dump_test "x86-64-fence-as-lock-add-no"
     run_dump_test "x86-64-pr20141"
diff --git a/gas/testsuite/gas/i386/ptwrite-intel.d b/gas/testsuite/gas/i386/ptwrite-intel.d
new file mode 100644
index 0000000..d39609a
--- /dev/null
+++ b/gas/testsuite/gas/i386/ptwrite-intel.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 PTWRITE insns (Intel disassembly)
+#source: ptwrite.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite ecx
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite ecx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwrite DWORD PTR \[ecx\]
+ +[a-f0-9]+:	f3 0f ae 21          	ptwrite DWORD PTR \[ecx\]
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite ecx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwrite DWORD PTR \[ecx\]
+#pass
diff --git a/gas/testsuite/gas/i386/ptwrite.d b/gas/testsuite/gas/i386/ptwrite.d
new file mode 100644
index 0000000..399c740
--- /dev/null
+++ b/gas/testsuite/gas/i386/ptwrite.d
@@ -0,0 +1,18 @@
+#as:
+#objdump: -dw
+#name: i386 PTWRITE insns
+#source: ptwrite.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite %ecx
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite %ecx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwritel \(%ecx\)
+ +[a-f0-9]+:	f3 0f ae 21          	ptwritel \(%ecx\)
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite %ecx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwritel \(%ecx\)
+#pass
diff --git a/gas/testsuite/gas/i386/ptwrite.s b/gas/testsuite/gas/i386/ptwrite.s
new file mode 100644
index 0000000..3aa4be7
--- /dev/null
+++ b/gas/testsuite/gas/i386/ptwrite.s
@@ -0,0 +1,12 @@
+# Check 32bit PTWRITE instructions
+
+	.text
+_start:
+	ptwrite %ecx
+	ptwritel %ecx
+	ptwrite (%ecx)
+	ptwritel (%ecx)
+
+	.intel_syntax noprefix
+	ptwrite ecx
+	ptwrite DWORD PTR [ecx]
diff --git a/gas/testsuite/gas/i386/x86-64-ptwrite-intel.d b/gas/testsuite/gas/i386/x86-64-ptwrite-intel.d
new file mode 100644
index 0000000..37e7945
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-ptwrite-intel.d
@@ -0,0 +1,23 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 PTWRITE insns (Intel disassembly)
+#source: x86-64-ptwrite.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite ecx
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite ecx
+ +[a-f0-9]+:	f3 48 0f ae e1       	ptwrite rcx
+ +[a-f0-9]+:	f3 48 0f ae e1       	ptwrite rcx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwrite DWORD PTR \[rcx\]
+ +[a-f0-9]+:	f3 0f ae 21          	ptwrite DWORD PTR \[rcx\]
+ +[a-f0-9]+:	f3 48 0f ae 21       	ptwrite QWORD PTR \[rcx\]
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite ecx
+ +[a-f0-9]+:	f3 48 0f ae e1       	ptwrite rcx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwrite DWORD PTR \[rcx\]
+ +[a-f0-9]+:	f3 48 0f ae 21       	ptwrite QWORD PTR \[rcx\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-ptwrite.d b/gas/testsuite/gas/i386/x86-64-ptwrite.d
new file mode 100644
index 0000000..75183b0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-ptwrite.d
@@ -0,0 +1,23 @@
+#as:
+#objdump: -dw
+#name: x86_64 PTWRITE insns
+#source: x86-64-ptwrite.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite %ecx
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite %ecx
+ +[a-f0-9]+:	f3 48 0f ae e1       	ptwrite %rcx
+ +[a-f0-9]+:	f3 48 0f ae e1       	ptwrite %rcx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwritel \(%rcx\)
+ +[a-f0-9]+:	f3 0f ae 21          	ptwritel \(%rcx\)
+ +[a-f0-9]+:	f3 48 0f ae 21       	ptwriteq \(%rcx\)
+ +[a-f0-9]+:	f3 0f ae e1          	ptwrite %ecx
+ +[a-f0-9]+:	f3 48 0f ae e1       	ptwrite %rcx
+ +[a-f0-9]+:	f3 0f ae 21          	ptwritel \(%rcx\)
+ +[a-f0-9]+:	f3 48 0f ae 21       	ptwriteq \(%rcx\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-ptwrite.s b/gas/testsuite/gas/i386/x86-64-ptwrite.s
new file mode 100644
index 0000000..2e62b3b
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-ptwrite.s
@@ -0,0 +1,17 @@
+# Check 64bit PTWRITE instructions
+
+	.text
+_start:
+	ptwrite %ecx
+	ptwritel %ecx
+	ptwrite %rcx
+	ptwriteq %rcx
+	ptwrite (%rcx)
+	ptwritel (%rcx)
+	ptwriteq (%rcx)
+
+	.intel_syntax noprefix
+	ptwrite ecx
+	ptwrite rcx
+	ptwrite DWORD PTR [rcx]
+	ptwrite QWORD PTR [rcx]