* config/tc-arm.c (check_ldr_r15_aligned): New.

	(do_ldst): Warn in upredictable cases.
	(do_t_ldst): Likewise.
	(insns): Update accordingly.

	* gas/arm/ldr-bad.s: New testcase.
	* gas/arm/ldr-bad.l: Likewise.
	* gas/arm/ldr-bad.d: Likewise.
	* gas/arm/ldr.s: Likewise.
	* gas/arm/ldr.d: Likewise.
	* gas/arm/ldr-t-bad.s: Likewise.
	* gas/arm/ldr-t-bad.l: Likewise.
	* gas/arm/ldr-t-bad.d: Likewise.
	* gas/arm/ldr-t.s: Likewise.
	* gas/arm/ldr-t.d: Likewise.
	* gas/arm/sp-pc-usage-t.s: Correct.
	* gas/arm/sp-pc-usage-t.d: Update accordingly.

15 files changed, 424 insertions, 60 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 98cab13..4c43c77 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2011-10-13  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/tc-arm.c (check_ldr_r15_aligned): New.
+	(do_ldst): Warn in upredictable cases.
+	(do_t_ldst): Likewise.
+	(insns): Update accordingly.
+
 2011-10-13  Alan Modra  <amodra@gmail.com>
 
 	* as.c (main): Define .gasversion. rather than __GAS_VERSION__.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 77606a3..8189c51 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -7915,6 +7915,18 @@ do_ldrexd (void)
   inst.instruction |= inst.operands[2].reg << 16;
 }
 
+/* In both ARM and thumb state 'ldr pc, #imm'  with an immediate
+   which is not a multiple of four is UNPREDICTABLE.  */
+static void
+check_ldr_r15_aligned (void)
+{
+  constraint (!(inst.operands[1].immisreg)
+	      && (inst.operands[0].reg == REG_PC
+	      && inst.operands[1].reg == REG_PC
+	      && (inst.reloc.exp.X_add_number & 0x3)),
+	      _("ldr to register 15 must be 4-byte alligned"));
+}
+
 static void
 do_ldst (void)
 {
@@ -7923,6 +7935,7 @@ do_ldst (void)
     if (move_or_literal_pool (0, /*thumb_p=*/FALSE, /*mode_3=*/FALSE))
       return;
   encode_arm_addr_mode_2 (1, /*is_t=*/FALSE);
+  check_ldr_r15_aligned ();
 }
 
 static void
@@ -10533,13 +10546,17 @@ do_t_ldst (void)
 	}
 
       /* Do some validations regarding addressing modes.  */
-      if (inst.operands[1].immisreg && opcode != T_MNEM_ldr
-	  && opcode != T_MNEM_str)
+      if (inst.operands[1].immisreg)
 	reject_bad_reg (inst.operands[1].imm);
 
+      constraint (inst.operands[1].writeback == 1
+		  && inst.operands[0].reg == inst.operands[1].reg,
+		  BAD_OVERLAP);
+
       inst.instruction = THUMB_OP32 (opcode);
       inst.instruction |= inst.operands[0].reg << 12;
       encode_thumb32_addr_mode (1, /*is_t=*/FALSE, /*is_d=*/FALSE);
+      check_ldr_r15_aligned ();
       return;
     }
 
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0ac479a..a162952 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,18 @@
+2011-10-13  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* gas/arm/ldr-bad.s: New testcase.
+	* gas/arm/ldr-bad.l: Likewise.
+	* gas/arm/ldr-bad.d: Likewise.
+	* gas/arm/ldr.s: Likewise.
+	* gas/arm/ldr.d: Likewise.
+	* gas/arm/ldr-t-bad.s: Likewise.
+	* gas/arm/ldr-t-bad.l: Likewise.
+	* gas/arm/ldr-t-bad.d: Likewise.
+	* gas/arm/ldr-t.s: Likewise.
+	* gas/arm/ldr-t.d: Likewise.
+	* gas/arm/sp-pc-usage-t.s: Correct.
+	* gas/arm/sp-pc-usage-t.d: Update accordingly.
+
 2011-09-28  Jan Beulich  <jbeulich@suse.com>
 
 	* gas/ppc/476.s: Fix lswi first operand.
diff --git a/gas/testsuite/gas/arm/ldr-bad.d b/gas/testsuite/gas/arm/ldr-bad.d
new file mode 100644
index 0000000..82a1718
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-bad.d
@@ -0,0 +1,3 @@
+# name: Unpredictable operations - ldr - arm
+# error-output: ldr-bad.l
+
diff --git a/gas/testsuite/gas/arm/ldr-bad.l b/gas/testsuite/gas/arm/ldr-bad.l
new file mode 100644
index 0000000..554b4a3
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-bad.l
@@ -0,0 +1,12 @@
+[^:]*: Assembler messages:
+[^:]*:5: Warning: destination register same as write-back base
+[^:]*:9: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,\[r15,#5\]'
+[^:]*:12: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,.-0xab7'
+[^:]*:15: Warning: destination register same as write-back base
+[^:]*:16: Error: cannot use register index with PC-relative addressing -- `ldr r2,\[r15,r2\]!'
+[^:]*:19: Error: cannot use register index with PC-relative addressing -- `ldr r1,\[r1,r15\]'
+[^:]*:22: Warning: source register same as write-back base
+[^:]*:23: Error: cannot use register index with PC-relative addressing -- `str r1,\[r15,#10\]!'
+[^:]*:26: Warning: source register same as write-back base
+[^:]*:27: Error: cannot use register index with PC-relative addressing -- `str r1,\[r15,r2\]!'
+
diff --git a/gas/testsuite/gas/arm/ldr-bad.s b/gas/testsuite/gas/arm/ldr-bad.s
new file mode 100644
index 0000000..2d452b6
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-bad.s
@@ -0,0 +1,28 @@
+.syntax unified
+
+.arm
+	@wback && (n == t)
+	ldr r1, [r1, #5]!
+
+	@rt == r15 && rn == r15
+	@  && bits<0..1> (immediate) != 00
+	ldr r15, [r15, #5]
+
+	@rt == r15 && bits<0..1> (immediate) != 00
+	ldr r15, .-0xab7
+
+	@wback && (n == t || n == 15)
+	ldr r1, [r1, r2]!
+	ldr r2, [r15, r2]!
+
+	@rm == 15
+	ldr r1, [r1, r15]
+
+	@wback && (n == t || n == 15)
+	str r1, [r1, #10]!
+	str r1, [r15, #10]!
+
+	@wback && (n == t || n == 15)
+	str r1, [r1, r2]!
+	str r1, [r15, r2]!
+
diff --git a/gas/testsuite/gas/arm/ldr-t-bad.d b/gas/testsuite/gas/arm/ldr-t-bad.d
new file mode 100644
index 0000000..0c28a85
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-t-bad.d
@@ -0,0 +1,3 @@
+# name: Unpredictable operations - ldr - thumb
+# error-output: ldr-t-bad.l
+
diff --git a/gas/testsuite/gas/arm/ldr-t-bad.l b/gas/testsuite/gas/arm/ldr-t-bad.l
new file mode 100644
index 0000000..bda9eef
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-t-bad.l
@@ -0,0 +1,16 @@
+[^:]*: Assembler messages:
+[^:]*:8: Error: registers may not be the same -- `ldr r1,\[r1,#5\]!'
+[^:]*:12: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,\[r15,#5\]'
+[^:]*:16: Error: branch must be last instruction in IT block -- `ldrge r15,\[r15,#4\]'
+[^:]*:25: Error: branch must be last instruction in IT block -- `ldrge r15,.0x4'
+[^:]*:30: Error: ldr to register 15 must be 4-byte alligned -- `ldr r15,.-0xab7'
+[^:]*:36: Error: branch must be last instruction in IT block -- `ldrge r15,\[r15,r1\]'
+[^:]*:41: Error: r13 not allowed here -- `ldr r1,\[r2,r13\]'
+[^:]*:42: Error: r15 not allowed here -- `ldr r2,\[r2,r15\]'
+[^:]*:47: Error: r15 not allowed here -- `str r15,\[r1,#10\]'
+[^:]*:48: Error: cannot use register index with PC-relative addressing -- `str r1,\[r15,#10\]'
+[^:]*:51: Error: registers may not be the same -- `str r1,\[r1,#10\]!'
+[^:]*:56: Error: r15 not allowed here -- `str r15,\[r1,r2\]'
+[^:]*:57: Error: r13 not allowed here -- `str r1,\[r2,r13\]'
+[^:]*:58: Error: r15 not allowed here -- `str r1,\[r2,r15\]'
+
diff --git a/gas/testsuite/gas/arm/ldr-t-bad.s b/gas/testsuite/gas/arm/ldr-t-bad.s
new file mode 100644
index 0000000..ee76a3e
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-t-bad.s
@@ -0,0 +1,59 @@
+.syntax unified
+
+.thumb
+
+	@ldr-immediate
+
+	@wback && (n == t)
+	ldr r1, [r1, #5]!
+
+	@rt == r15 && rn == r15
+	@  && bits<0..1> (immediate) != 00
+	ldr r15, [r15, #5]
+
+	@inITBlock && rt == 15 && !lastInITBlock
+	ittt ge
+	ldrge r15, [r15, #4]
+	nopge
+	nopge
+
+	@ldr-literal
+
+
+	@inITBlock && rt == 15 && !lastInITBlock
+	ittt ge
+	ldrge r15, .0x4
+	nopge
+	nopge
+
+	@rt == r15 && bits<0..1> (immediate) != 00
+	ldr r15, .-0xab7
+
+	@ldr-register
+
+	@inITBlock && rt == 15 && !lastInITBlock
+	ittt ge
+	ldrge r15, [r15, r1]
+	nopge
+	nopge
+
+	@rm == 13 || rm == 15
+	ldr r1, [r2, r13]
+	ldr r2, [r2, r15]
+
+	@str-immediate
+
+	@rt == 15 || rn == 15
+	str r15, [r1, #10]
+	str r1, [r15, #10]
+
+	@wback && (n == t)
+	str r1, [r1, #10]!
+
+	@str-register
+
+	@rt == 15 || rm == 13 || rm == 15
+	str r15, [r1, r2]
+	str r1, [r2, r13]
+	str r1, [r2, r15]
+
diff --git a/gas/testsuite/gas/arm/ldr-t.d b/gas/testsuite/gas/arm/ldr-t.d
new file mode 100644
index 0000000..1b50837
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-t.d
@@ -0,0 +1,37 @@
+# name: ldr - thumb
+#objdump: -dr --prefix-address --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section [^>]+:
+0+00 <[^>]+> f8d1 1005 	ldr.w	r1, \[r1, #5\]
+0+04 <[^>]+> f852 1f05 	ldr.w	r1, \[r2, #5\]!
+0+08 <[^>]+> f8df 1005 	ldr.w	r1, \[pc, #5\]	; 0+11 <[^>]+0x11>
+0+0c <[^>]+> f8d1 f005 	ldr.w	pc, \[r1, #5\]
+0+10 <[^>]+> f8df f004 	ldr.w	pc, \[pc, #4\]	; 0+18 <[^>]+0x18>
+0+14 <[^>]+> bfa2      	ittt	ge
+0+16 <[^>]+> 4901      	ldrge	r1, \[pc, #4\]	; \(0+1c <[^>]+0x1c>\)
+0+18 <[^>]+> 46c0      	nopge			; \(mov r8, r8\)
+0+1a <[^>]+> 46c0      	nopge			; \(mov r8, r8\)
+0+1c <[^>]+> bfa8      	it	ge
+0+1e <[^>]+> f8df f004 	ldrge.w	pc, \[pc, #4\]	; 0+24 <[^>]+0x24>
+0+22 <[^>]+> bfa2      	ittt	ge
+0+24 <[^>]+> f85f 1ab8 	ldrge.w	r1, \[pc, #-2744\]	; fffff570 <[^>]+>
+0+28 <[^>]+> 46c0      	nopge			; \(mov r8, r8\)
+0+2a <[^>]+> 46c0      	nopge			; \(mov r8, r8\)
+0+2c <[^>]+> bfa8      	it	ge
+0+2e <[^>]+> f85f fab6 	ldrge.w	pc, \[pc, #-2742\]	; fffff57a <[^>]+>
+0+32 <[^>]+> f85f 1ab9 	ldr.w	r1, \[pc, #-2745\]	; fffff57b <[^>]+>
+0+36 <[^>]+> f85f fab6 	ldr.w	pc, \[pc, #-2742\]	; fffff582 <[^>]+>
+0+3a <[^>]+> bfa2      	ittt	ge
+0+3c <[^>]+> 5851      	ldrge	r1, \[r2, r1\]
+0+3e <[^>]+> 46c0      	nopge			; \(mov r8, r8\)
+0+40 <[^>]+> 46c0      	nopge			; \(mov r8, r8\)
+0+42 <[^>]+> bfa8      	it	ge
+0+44 <[^>]+> f852 f001 	ldrge.w	pc, \[r2, r1\]
+0+48 <[^>]+> 58d1      	ldr	r1, \[r2, r3\]
+0+4a <[^>]+> f8c2 100a 	str.w	r1, \[r2, #10\]
+0+4e <[^>]+> f8c1 100a 	str.w	r1, \[r1, #10\]
+0+52 <[^>]+> f842 1f0a 	str.w	r1, \[r2, #10\]!
+0+56 <[^>]+> 50d1      	str	r1, \[r2, r3\]
+
diff --git a/gas/testsuite/gas/arm/ldr-t.s b/gas/testsuite/gas/arm/ldr-t.s
new file mode 100644
index 0000000..b6462c9
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr-t.s
@@ -0,0 +1,84 @@
+.syntax unified
+
+.thumb
+	.global foo
+foo:
+	@ldr-immediate
+
+	@!wback && (n == t)
+	ldr r1, [r1, #5]
+
+	@wback && !(n == t)
+	ldr r1, [r2, #5]!
+
+	@!(rt == r15) && rn == r15
+	@  && bits<0..1> (immediate) != 00
+	ldr r1, [r15, #5]
+
+	@rt == r15 && !(rn == r15)
+	@  && bits<0..1> (immediate) != 00
+	ldr r15, [r1, #5]
+
+	@rt == r15 && rn == r15
+	@  && bits<0..1> (immediate) == 00
+	ldr r15, [r15, #4]
+
+	@inITBlock && !(rt == 15) && !lastInITBlock
+	ittt ge
+	ldrge r1, [r15, #4]
+	nopge
+	nopge
+
+	@inITBlock && rt == 15 && lastInITBlock
+	it ge
+	ldrge r15, [r15, #4]
+
+	@ldr-literal
+
+	@inITBlock && !(rt == 15) && !lastInITBlock
+	ittt ge
+	ldrge r1, .-0xab4
+	nopge
+	nopge
+
+	@inITBlock && (rt == 15) && lastInITBlock
+	it ge
+	ldrge r15, .-0xab4
+
+	@!(rt == r15) && bits<0..1> (immediate) != 00
+	ldr r1, .-0xab7
+
+	@rt == r15 && bits<0..1> (immediate) == 00
+	ldr r15, .-0xab4
+
+	@ldr-register
+
+	@inITBlock && !(rt == 15) && !lastInITBlock
+	ittt ge
+	ldrge r1, [r2, r1]
+	nopge
+	nopge
+
+	@inITBlock && (rt == 15) && lastInITBlock
+	it ge
+	ldrge r15, [r2, r1]
+
+	@!(rm == 13 || rm == 15)
+	ldr r1, [r2, r3]
+
+	@str-immediate
+
+	@!(rt == 15 || rn == 15)
+	str r1, [r2, #10]
+
+	@!wback && (n == t)
+	str r1, [r1, #10]
+
+	@wback && !(n == t)
+	str r1, [r2, #10]!
+
+	@str-register
+
+	@!(rt == 15 || rm == 13 || rm == 15)
+	str r1, [r2, r3]
+
diff --git a/gas/testsuite/gas/arm/ldr.d b/gas/testsuite/gas/arm/ldr.d
new file mode 100644
index 0000000..6e959de
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr.d
@@ -0,0 +1,24 @@
+# name: ldr - arm
+#objdump: -dr --prefix-address --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+0+00 <[^>]+> e5911005 	ldr	r1, \[r1, #5\]
+0+04 <[^>]+> e5b21005 	ldr	r1, \[r2, #5\]!
+0+08 <[^>]+> e59f1005 	ldr	r1, \[pc, #5\]	; 0+15 <[^>]+0x15>
+0+0c <[^>]+> e591f005 	ldr	pc, \[r1, #5\]
+0+10 <[^>]+> e59ff004 	ldr	pc, \[pc, #4\]	; 0+1c <[^>]+0x1c>
+0+14 <[^>]+> e51ffabc 	ldr	pc, \[pc, #-2748\]	; fffff560 <[^>]+>
+0+18 <[^>]+> e51f1abf 	ldr	r1, \[pc, #-2751\]	; fffff561 <[^>]+>
+0+1c <[^>]+> e7911002 	ldr	r1, \[r1, r2\]
+0+20 <[^>]+> e79f2002 	ldr	r2, \[pc, r2\]
+0+24 <[^>]+> e7b21003 	ldr	r1, \[r2, r3\]!
+0+28 <[^>]+> e791100c 	ldr	r1, \[r1, ip\]
+0+2c <[^>]+> e581100a 	str	r1, \[r1, #10\]
+0+30 <[^>]+> e58f100a 	str	r1, \[pc, #10\]	; 0+42 <[^>]+0x42>
+0+34 <[^>]+> e5a2100a 	str	r1, \[r2, #10\]!
+0+38 <[^>]+> e7811002 	str	r1, \[r1, r2\]
+0+3c <[^>]+> e78f1002 	str	r1, \[pc, r2\]
+0+40 <[^>]+> e7a21003 	str	r1, \[r2, r3\]!
+
diff --git a/gas/testsuite/gas/arm/ldr.s b/gas/testsuite/gas/arm/ldr.s
new file mode 100644
index 0000000..f09d1b0
--- /dev/null
+++ b/gas/testsuite/gas/arm/ldr.s
@@ -0,0 +1,62 @@
+.syntax unified
+
+.arm
+
+	@ldr-immediate
+
+	@!wback && (n == t)
+	ldr r1, [r1, #5]
+
+	@wback && !(n == t)
+	ldr r1, [r2, #5]!
+
+	@ !(rt == r15) && (rn == r15)
+	@  && bits<0..1> (immediate) != 00
+	ldr r1, [r15, #5]
+
+	@ (rt == r15) && !(rn == r15)
+	@  && bits<0..1> (immediate) != 00
+	ldr r15, [r1, #5]
+
+	@ ((rt == r15) && ((rn == r15)
+	@  && (bits<0..1> (immediate) == 00)))
+	ldr r15, [r15, #4]
+
+	@ldr-literal
+
+	@rt == r15 && (bits<0..1> (immediate) == 00)
+	ldr r15, .-0xab4
+
+	@(!rt == r15) && bits<0..1> (immediate) != 00
+	ldr r1, .-0xab7
+
+	@ldr-register
+
+	@!wback && (n == t || n == 15)
+	ldr r1, [r1, r2]
+	ldr r2, [r15, r2]
+
+	@wback && !(n == t || n == 15)
+	ldr r1, [r2, r3]!
+
+	@rm != 15
+	ldr r1, [r1, r12]
+
+	@str-immediate
+
+	@!wback && (n == t || n == 15)
+	str r1, [r1, #10]
+	str r1, [r15, #10]
+
+	@wback && !(n == t || n == 15)
+	str r1, [r2, #10]!
+
+	@str-register
+
+	@!wback && (n == t || n == 15)
+	str r1, [r1, r2]
+	str r1, [r15, r2]
+
+	@wback && !(n == t || n == 15)
+	str r1, [r2, r3]!
+
diff --git a/gas/testsuite/gas/arm/sp-pc-usage-t.d b/gas/testsuite/gas/arm/sp-pc-usage-t.d
index 706f2a1..6dedc00 100644
--- a/gas/testsuite/gas/arm/sp-pc-usage-t.d
+++ b/gas/testsuite/gas/arm/sp-pc-usage-t.d
@@ -22,62 +22,61 @@ Disassembly of section .text:
 0000002e <foo\+0x2e> f8dd d000 	ldr.w	sp, \[sp\]
 00000032 <foo\+0x32> f8dd f000 	ldr.w	pc, \[sp\]
 00000036 <foo\+0x36> f8df d000 	ldr.w	sp, \[pc\]	; 00000038 <foo\+0x38>
-0000003a <foo\+0x3a> f850 d00f 	ldr.w	sp, \[r0, pc\]
-0000003e <foo\+0x3e> 9000      	str	r0, \[sp, #0\]
-00000040 <foo\+0x40> f8c0 d000 	str.w	sp, \[r0\]
-00000044 <foo\+0x44> f8cd d000 	str.w	sp, \[sp\]
-00000048 <foo\+0x48> f840 d00f 	str.w	sp, \[r0, pc\]
-0000004c <foo\+0x4c> 4468      	add	r0, sp
-0000004e <foo\+0x4e> eb1d 0000 	adds.w	r0, sp, r0
-00000052 <foo\+0x52> eb0d 0040 	add.w	r0, sp, r0, lsl #1
-00000056 <foo\+0x56> eb1d 0040 	adds.w	r0, sp, r0, lsl #1
-0000005a <foo\+0x5a> f11d 0f00 	cmn.w	sp, #0
-0000005e <foo\+0x5e> eb1d 0f00 	cmn.w	sp, r0
-00000062 <foo\+0x62> eb1d 0f40 	cmn.w	sp, r0, lsl #1
-00000066 <foo\+0x66> f1bd 0f00 	cmp.w	sp, #0
-0000006a <foo\+0x6a> 4585      	cmp	sp, r0
-0000006c <foo\+0x6c> ebbd 0f40 	cmp.w	sp, r0, lsl #1
-00000070 <foo\+0x70> b080      	sub	sp, #0
-00000072 <foo\+0x72> f1bd 0d00 	subs.w	sp, sp, #0
-00000076 <foo\+0x76> f1ad 0000 	sub.w	r0, sp, #0
-0000007a <foo\+0x7a> f1bd 0000 	subs.w	r0, sp, #0
-0000007e <foo\+0x7e> b001      	add	sp, #4
-00000080 <foo\+0x80> a801      	add	r0, sp, #4
-00000082 <foo\+0x82> f11d 0d04 	adds.w	sp, sp, #4
-00000086 <foo\+0x86> f11d 0004 	adds.w	r0, sp, #4
-0000008a <foo\+0x8a> f20d 0004 	addw	r0, sp, #4
-0000008e <foo\+0x8e> b001      	add	sp, #4
-00000090 <foo\+0x90> f11d 0d04 	adds.w	sp, sp, #4
-00000094 <foo\+0x94> f20d 0d04 	addw	sp, sp, #4
-00000098 <foo\+0x98> 4485      	add	sp, r0
-0000009a <foo\+0x9a> 4468      	add	r0, sp
-0000009c <foo\+0x9c> eb0d 0040 	add.w	r0, sp, r0, lsl #1
-000000a0 <foo\+0xa0> eb1d 0d00 	adds.w	sp, sp, r0
-000000a4 <foo\+0xa4> eb1d 0000 	adds.w	r0, sp, r0
-000000a8 <foo\+0xa8> eb1d 0040 	adds.w	r0, sp, r0, lsl #1
-000000ac <foo\+0xac> 4485      	add	sp, r0
-000000ae <foo\+0xae> eb0d 0d40 	add.w	sp, sp, r0, lsl #1
-000000b2 <foo\+0xb2> eb1d 0d00 	adds.w	sp, sp, r0
-000000b6 <foo\+0xb6> eb1d 0d40 	adds.w	sp, sp, r0, lsl #1
-000000ba <foo\+0xba> 44ed      	add	sp, sp
-000000bc <foo\+0xbc> f1ad 0000 	sub.w	r0, sp, #0
-000000c0 <foo\+0xc0> f1bd 0000 	subs.w	r0, sp, #0
-000000c4 <foo\+0xc4> f2ad 0000 	subw	r0, sp, #0
-000000c8 <foo\+0xc8> b080      	sub	sp, #0
-000000ca <foo\+0xca> f1bd 0d00 	subs.w	sp, sp, #0
-000000ce <foo\+0xce> f2ad 0d00 	subw	sp, sp, #0
-000000d2 <foo\+0xd2> b080      	sub	sp, #0
-000000d4 <foo\+0xd4> f1bd 0d00 	subs.w	sp, sp, #0
-000000d8 <foo\+0xd8> ebad 0040 	sub.w	r0, sp, r0, lsl #1
-000000dc <foo\+0xdc> ebbd 0040 	subs.w	r0, sp, r0, lsl #1
-000000e0 <foo\+0xe0> ebad 0d40 	sub.w	sp, sp, r0, lsl #1
-000000e4 <foo\+0xe4> ebbd 0d40 	subs.w	sp, sp, r0, lsl #1
-000000e8 <foo\+0xe8> a001      	add	r0, pc, #4	; \(adr r0, 000000f0 <foo\+0xf0>\)
+0000003a <foo\+0x3a> 9000      	str	r0, \[sp, #0\]
+0000003c <foo\+0x3c> f8c0 d000 	str.w	sp, \[r0\]
+00000040 <foo\+0x40> f8cd d000 	str.w	sp, \[sp\]
+00000044 <foo\+0x44> 4468      	add	r0, sp
+00000046 <foo\+0x46> eb1d 0000 	adds.w	r0, sp, r0
+0000004a <foo\+0x4a> eb0d 0040 	add.w	r0, sp, r0, lsl #1
+0000004e <foo\+0x4e> eb1d 0040 	adds.w	r0, sp, r0, lsl #1
+00000052 <foo\+0x52> f11d 0f00 	cmn.w	sp, #0
+00000056 <foo\+0x56> eb1d 0f00 	cmn.w	sp, r0
+0000005a <foo\+0x5a> eb1d 0f40 	cmn.w	sp, r0, lsl #1
+0000005e <foo\+0x5e> f1bd 0f00 	cmp.w	sp, #0
+00000062 <foo\+0x62> 4585      	cmp	sp, r0
+00000064 <foo\+0x64> ebbd 0f40 	cmp.w	sp, r0, lsl #1
+00000068 <foo\+0x68> b080      	sub	sp, #0
+0000006a <foo\+0x6a> f1bd 0d00 	subs.w	sp, sp, #0
+0000006e <foo\+0x6e> f1ad 0000 	sub.w	r0, sp, #0
+00000072 <foo\+0x72> f1bd 0000 	subs.w	r0, sp, #0
+00000076 <foo\+0x76> b001      	add	sp, #4
+00000078 <foo\+0x78> a801      	add	r0, sp, #4
+0000007a <foo\+0x7a> f11d 0d04 	adds.w	sp, sp, #4
+0000007e <foo\+0x7e> f11d 0004 	adds.w	r0, sp, #4
+00000082 <foo\+0x82> f20d 0004 	addw	r0, sp, #4
+00000086 <foo\+0x86> b001      	add	sp, #4
+00000088 <foo\+0x88> f11d 0d04 	adds.w	sp, sp, #4
+0000008c <foo\+0x8c> f20d 0d04 	addw	sp, sp, #4
+00000090 <foo\+0x90> 4485      	add	sp, r0
+00000092 <foo\+0x92> 4468      	add	r0, sp
+00000094 <foo\+0x94> eb0d 0040 	add.w	r0, sp, r0, lsl #1
+00000098 <foo\+0x98> eb1d 0d00 	adds.w	sp, sp, r0
+0000009c <foo\+0x9c> eb1d 0000 	adds.w	r0, sp, r0
+000000a0 <foo\+0xa0> eb1d 0040 	adds.w	r0, sp, r0, lsl #1
+000000a4 <foo\+0xa4> 4485      	add	sp, r0
+000000a6 <foo\+0xa6> eb0d 0d40 	add.w	sp, sp, r0, lsl #1
+000000aa <foo\+0xaa> eb1d 0d00 	adds.w	sp, sp, r0
+000000ae <foo\+0xae> eb1d 0d40 	adds.w	sp, sp, r0, lsl #1
+000000b2 <foo\+0xb2> 44ed      	add	sp, sp
+000000b4 <foo\+0xb4> f1ad 0000 	sub.w	r0, sp, #0
+000000b8 <foo\+0xb8> f1bd 0000 	subs.w	r0, sp, #0
+000000bc <foo\+0xbc> f2ad 0000 	subw	r0, sp, #0
+000000c0 <foo\+0xc0> b080      	sub	sp, #0
+000000c2 <foo\+0xc2> f1bd 0d00 	subs.w	sp, sp, #0
+000000c6 <foo\+0xc6> f2ad 0d00 	subw	sp, sp, #0
+000000ca <foo\+0xca> b080      	sub	sp, #0
+000000cc <foo\+0xcc> f1bd 0d00 	subs.w	sp, sp, #0
+000000d0 <foo\+0xd0> ebad 0040 	sub.w	r0, sp, r0, lsl #1
+000000d4 <foo\+0xd4> ebbd 0040 	subs.w	r0, sp, r0, lsl #1
+000000d8 <foo\+0xd8> ebad 0d40 	sub.w	sp, sp, r0, lsl #1
+000000dc <foo\+0xdc> ebbd 0d40 	subs.w	sp, sp, r0, lsl #1
+000000e0 <foo\+0xe0> a001      	add	r0, pc, #4	; \(adr r0, 000000e8 <foo\+0xe8>\)
+000000e2 <foo\+0xe2> f2af 0004 	subw	r0, pc, #4
+000000e6 <foo\+0xe6> f20f 0004 	addw	r0, pc, #4
 000000ea <foo\+0xea> f2af 0004 	subw	r0, pc, #4
 000000ee <foo\+0xee> f20f 0004 	addw	r0, pc, #4
 000000f2 <foo\+0xf2> f2af 0004 	subw	r0, pc, #4
-000000f6 <foo\+0xf6> f20f 0004 	addw	r0, pc, #4
-000000fa <foo\+0xfa> f2af 0004 	subw	r0, pc, #4
-000000fe <foo\+0xfe> bf00[ 	]+nop
-00000100 <foo\+0x100> bf00[ 	]+nop
-00000102 <foo\+0x102> bf00[ 	]+nop
+000000f6 <foo\+0xf6> bf00      	nop
+000000f8 <foo\+0xf8> bf00      	nop
+000000fa <foo\+0xfa> bf00      	nop
+
diff --git a/gas/testsuite/gas/arm/sp-pc-usage-t.s b/gas/testsuite/gas/arm/sp-pc-usage-t.s
index 1756866..6cfebed 100644
--- a/gas/testsuite/gas/arm/sp-pc-usage-t.s
+++ b/gas/testsuite/gas/arm/sp-pc-usage-t.s
@@ -35,12 +35,10 @@ ldr	pc, [pc]
 ldr	sp, [sp]
 ldr	pc, [sp]
 ldr	sp, [pc]
-ldr	sp, [r0, +pc]
 
 str	r0, [sp]
 str	sp, [r0]
 str	sp, [sp]
-str	sp, [r0, +pc]
 
 @ R13 as the first operand <Rn> in any add{s}, cmn, cmp, or sub{s} instruction.