* config/tc-mips.c (append_insn): Cope with a complex reloc

        sequence containing an unsupported reloc type.
        (enum options): Replace computed #define's constants for option
        numbers with this enum.
        (struct md_longopts): Use the enum.  Allow OPTION_32 in a non-ELF
        environment.
        (md_parse_option): Allow -32 in a non-ELF environment.

        * gas/lib/gas-defs.exp: Update description of run_dump_test proc.

        * gas/mips/dli.d: Pass -64 to gas.
        * gas/mips/mips64-mips3d-incl.d: Likewise.
        * gas/mips/octeon.d: Likewise.
        * gas/mips/sb1-ext-mdmx.d: Likewise.
        * gas/mips/sb1-ext-ps.d: Likewise.
        * gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
        Update expected relocs.
        * gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
        * gas/mips/mips.exp: Remove 'ilocks' variable.
        Add ecoff targets to 'addr32' variable.
        Set 'no_mips16' for ecoff targets.
        Do not run div-ilocks or mul-ilocks test variants.
        * gas/mips/mips16-intermix.d: Use nm instead of objdump so that
        the symbol table output is sorted.  Update expecetd output.

12 files changed, 166 insertions, 199 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index a1ebfbd..8ab7636 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,22 @@
+2009-01-27  Nick Clifton  <nickc@redhat.com>
+
+	* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
+
+	* gas/mips/dli.d: Pass -64 to gas.
+	* gas/mips/mips64-mips3d-incl.d: Likewise.
+	* gas/mips/octeon.d: Likewise.
+	* gas/mips/sb1-ext-mdmx.d: Likewise.
+	* gas/mips/sb1-ext-ps.d: Likewise.
+	* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
+	Update expected relocs.
+	* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
+	* gas/mips/mips.exp: Remove 'ilocks' variable.
+	Add ecoff targets to 'addr32' variable.
+	Set 'no_mips16' for ecoff targets.
+	Do not run div-ilocks or mul-ilocks test variants.
+	* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
+	the symbol table output is sorted.  Update expecetd output.
+
 2009-01-26  Andrew Stubbs  <ams@codesourcery.com>
 
 	* gas/arm/attr-cpu-directive.d: New file.
@@ -78,7 +97,7 @@
 2009-01-26  Nick Clifton  <nickc@redhat.com>
 
 	* gas/arm/attr-order.d: Do not run this test for non-ELF based ARM
-	targets. 
+	targets.
 
 2009-01-24  Andreas Schwab  <schwab@suse.de>
 
diff --git a/gas/testsuite/gas/mips/dli.d b/gas/testsuite/gas/mips/dli.d
index 726b13b..40be40c 100644
--- a/gas/testsuite/gas/mips/dli.d
+++ b/gas/testsuite/gas/mips/dli.d
@@ -1,5 +1,6 @@
 #objdump: -dr --prefix-addresses
 #name: MIPS dli
+#as: -64
 
 # Test the dli macro.
 
diff --git a/gas/testsuite/gas/mips/e32el-rel2.d b/gas/testsuite/gas/mips/e32el-rel2.d
index 208c987..2bf8254 100644
--- a/gas/testsuite/gas/mips/e32el-rel2.d
+++ b/gas/testsuite/gas/mips/e32el-rel2.d
@@ -1,6 +1,7 @@
 #objdump: -sr -j .text
 #name: MIPS ELF reloc 2 (32-bit)
 #source: elf-rel2.s
+#as: -32 -march=mips3
 
 # Test the GPREL and LITERAL generation.
 # FIXME: really this should check that the contents of .sdata, .lit4,
@@ -13,18 +14,15 @@ OFFSET [ ]+ TYPE              VALUE
 0+0000000 R_MIPS_LITERAL    \.lit8\+0x0+0004000
 0+0000004 R_MIPS_LITERAL    \.lit8\+0x0+0004000
 0+0000008 R_MIPS_LITERAL    \.lit8\+0x0+0004000
-0+000000c R_MIPS_LITERAL    \.lit8\+0x0+0004000
-0+0000010 R_MIPS_LITERAL    \.lit8\+0x0+0004000
-0+0000014 R_MIPS_LITERAL    \.lit8\+0x0+0004000
-0+0000018 R_MIPS_LITERAL    \.lit4\+0x0+0004000
-0+000001c R_MIPS_LITERAL    \.lit4\+0x0+0004000
-0+0000020 R_MIPS_LITERAL    \.lit4\+0x0+0004000
-0+0000024 R_MIPS_GPREL16    \.sdata\+0x0+0004000
-0+0000028 R_MIPS_GPREL16    \.sdata\+0x0+0004000
-0+000002c R_MIPS_GPREL16    \.sdata\+0x0+0004000
+0+000000c R_MIPS_LITERAL    \.lit4\+0x0+0004000
+0+0000010 R_MIPS_LITERAL    \.lit4\+0x0+0004000
+0+0000014 R_MIPS_LITERAL    \.lit4\+0x0+0004000
+0+0000018 R_MIPS_GPREL16    \.sdata\+0x0+0004000
+0+000001c R_MIPS_GPREL16    \.sdata\+0x0+0004000
+0+0000020 R_MIPS_GPREL16    \.sdata\+0x0+0004000
 
 
 Contents of section \.text:
- 0000 00c082c7 04c083c7 08c082c7 0cc083c7  .*
- 0010 10c082c7 14c083c7 00c082c7 04c082c7  .*
- 0020 08c082c7 00c0828f 04c0828f 08c0828f  .*
+ 0000 00c082d7 08c082d7 10c082d7 00c082c7  .*
+ 0010 04c082c7 08c082c7 00c0828f 04c0828f  .*
+ 0020 08c0828f .*
diff --git a/gas/testsuite/gas/mips/ld-ilocks-addr32.d b/gas/testsuite/gas/mips/ld-ilocks-addr32.d
index 52c6d2f..3b4a04b 100644
--- a/gas/testsuite/gas/mips/ld-ilocks-addr32.d
+++ b/gas/testsuite/gas/mips/ld-ilocks-addr32.d
@@ -2,6 +2,7 @@
 #as: -mips3 -mtune=r4000 -march=r4000
 #name: MIPS ld-ilocks
 #source: ld.s
+#not-target: mipstx39-*-*
 
 # Test the ld macro.
 
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 0dc6017..913b44d 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -379,9 +379,8 @@ if { [istarget mips*-*-vxworks*] } {
     set elf [expr [istarget *-*-elf*] || [istarget *-*-irix5*] || [istarget *-*-irix6* ] || [istarget *-*-linux*] || [istarget *-*-netbsd*] ]
     set ecoff [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
     set aout [expr [istarget *-*-bsd*] || [istarget *-*-openbsd*] ]
-    set ilocks [istarget mipstx39*-*-*]
     set gpr_ilocks [expr [istarget mipstx39*-*-*]]
-    set addr32 [expr [istarget mipstx39*-*-*] || [istarget mips-*-linux*] || [istarget mipsel-*-linux*]]
+    set addr32 [expr [istarget mipstx39*-*-*] || [istarget mips-*-linux*] || [istarget mipsel-*-linux*] || [istarget mips*-*-ecoff]]
     set has_newabi [expr [istarget *-*-irix6*] || [istarget mips64*-*-linux*]]
 
     if { [istarget "mips*-*-*linux*"] || [istarget "mips*-sde-elf*"] } then {
@@ -394,7 +393,10 @@ if { [istarget mips*-*-vxworks*] } {
     } {
 	set el ""
     }
-
+    if { $ecoff } {
+	set no_mips16 1
+    }
+    
     run_dump_test_arches "abs"		[mips_arch_list_matching mips1]
     run_dump_test_arches "add"		[mips_arch_list_matching mips1]
     run_dump_test_arches "and"		[mips_arch_list_matching mips1]
@@ -422,12 +424,8 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test_arches "branch-misc-2pic-64" [mips_arch_list_matching mips3]
     run_dump_test "branch-misc-3"
     run_dump_test "branch-swap"
+    run_dump_test "div"
 
-    if $ilocks {
-	run_dump_test "div-ilocks"
-    } else {
-	run_dump_test "div"
-    }
     if { !$addr32 } {
 	run_dump_test_arches "dli"		[mips_arch_list_matching mips3]
     }
@@ -482,11 +480,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_list_test_arches "mips4-fp" "-32 -msoft-float" \
 					[mips_arch_list_matching mips4]
     run_dump_test_arches "mips5"	[mips_arch_list_matching mips5]
-    if $ilocks {
-	run_dump_test "mul-ilocks"
-    } else {
-	run_dump_test "mul"
-    }
+    run_dump_test "mul"
 
     run_dump_test_arches "rol"		[mips_arch_list_matching !ror]
     run_dump_test_arches "rol-hw" 	[mips_arch_list_matching ror]
diff --git a/gas/testsuite/gas/mips/mips16-intermix.d b/gas/testsuite/gas/mips/mips16-intermix.d
index e0e07c8..0242d9c 100644
--- a/gas/testsuite/gas/mips/mips16-intermix.d
+++ b/gas/testsuite/gas/mips/mips16-intermix.d
@@ -1,164 +1,121 @@
-#objdump: -t
+#PROG: nm
 #as: -mips32r2 -32
 #name: MIPS16 intermix
 
-.*: +file format .*mips.*
-
-SYMBOL TABLE:
-#...
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_l
-0+[0-9a-f]+ l    d  .mips16.fn.m16_d	0+[0-9a-f]+ .mips16.fn.m16_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_d	0+[0-9a-f]+ __fn_stub_m16_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static_d	0+[0-9a-f]+ .mips16.fn.m16_static_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static_d	0+[0-9a-f]+ __fn_stub_m16_static_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static1_d	0+[0-9a-f]+ .mips16.fn.m16_static1_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static1_d	0+[0-9a-f]+ __fn_stub_m16_static1_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static32_d	0+[0-9a-f]+ .mips16.fn.m16_static32_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static32_d	0+[0-9a-f]+ __fn_stub_m16_static32_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static16_d	0+[0-9a-f]+ .mips16.fn.m16_static16_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static16_d	0+[0-9a-f]+ __fn_stub_m16_static16_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_ld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_ld
-0+[0-9a-f]+ l    d  .mips16.fn.m16_dl	0+[0-9a-f]+ .mips16.fn.m16_dl
-0+[0-9a-f]+ l     F .mips16.fn.m16_dl	0+[0-9a-f]+ __fn_stub_m16_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_dl
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static_dl	0+[0-9a-f]+ .mips16.fn.m16_static_dl
-0+[0-9a-f]+ l     F .mips16.fn.m16_static_dl	0+[0-9a-f]+ __fn_stub_m16_static_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_dl
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static1_dl	0+[0-9a-f]+ .mips16.fn.m16_static1_dl
-0+[0-9a-f]+ l     F .mips16.fn.m16_static1_dl	0+[0-9a-f]+ __fn_stub_m16_static1_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_dl
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static32_dl	0+[0-9a-f]+ .mips16.fn.m16_static32_dl
-0+[0-9a-f]+ l     F .mips16.fn.m16_static32_dl	0+[0-9a-f]+ __fn_stub_m16_static32_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_dl
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_dl
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static16_dl	0+[0-9a-f]+ .mips16.fn.m16_static16_dl
-0+[0-9a-f]+ l     F .mips16.fn.m16_static16_dl	0+[0-9a-f]+ __fn_stub_m16_static16_dl
-0+[0-9a-f]+ l    d  .mips16.fn.m16_dlld	0+[0-9a-f]+ .mips16.fn.m16_dlld
-0+[0-9a-f]+ l     F .mips16.fn.m16_dlld	0+[0-9a-f]+ __fn_stub_m16_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_dlld
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static_dlld	0+[0-9a-f]+ .mips16.fn.m16_static_dlld
-0+[0-9a-f]+ l     F .mips16.fn.m16_static_dlld	0+[0-9a-f]+ __fn_stub_m16_static_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_dlld
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static1_dlld	0+[0-9a-f]+ .mips16.fn.m16_static1_dlld
-0+[0-9a-f]+ l     F .mips16.fn.m16_static1_dlld	0+[0-9a-f]+ __fn_stub_m16_static1_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_dlld
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static32_dlld	0+[0-9a-f]+ .mips16.fn.m16_static32_dlld
-0+[0-9a-f]+ l     F .mips16.fn.m16_static32_dlld	0+[0-9a-f]+ __fn_stub_m16_static32_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_dlld
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static16_dlld	0+[0-9a-f]+ .mips16.fn.m16_static16_dlld
-0+[0-9a-f]+ l     F .mips16.fn.m16_static16_dlld	0+[0-9a-f]+ __fn_stub_m16_static16_dlld
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_d_l
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_d_l
-0+[0-9a-f]+ l    d  .mips16.fn.m16_d_d	0+[0-9a-f]+ .mips16.fn.m16_d_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_d_d	0+[0-9a-f]+ __fn_stub_m16_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static_d_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static_d_d	0+[0-9a-f]+ .mips16.fn.m16_static_d_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static_d_d	0+[0-9a-f]+ __fn_stub_m16_static_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static1_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static1_d_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static1_d_d	0+[0-9a-f]+ .mips16.fn.m16_static1_d_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static1_d_d	0+[0-9a-f]+ __fn_stub_m16_static1_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static32_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static32_d_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static32_d_d	0+[0-9a-f]+ .mips16.fn.m16_static32_d_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static32_d_d	0+[0-9a-f]+ __fn_stub_m16_static32_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ m32_static16_d_d
-0+[0-9a-f]+ l     F .text	0+[0-9a-f]+ 0xf0 m16_static16_d_d
-0+[0-9a-f]+ l    d  .mips16.fn.m16_static16_d_d	0+[0-9a-f]+ .mips16.fn.m16_static16_d_d
-0+[0-9a-f]+ l     F .mips16.fn.m16_static16_d_d	0+[0-9a-f]+ __fn_stub_m16_static16_d_d
-0+[0-9a-f]+ l    d  .mips16.call.m32_static1_d	0+[0-9a-f]+ .mips16.call.m32_static1_d
-0+[0-9a-f]+ l     F .mips16.call.m32_static1_d	0+[0-9a-f]+ __call_stub_m32_static1_d
-0+[0-9a-f]+ l    d  .mips16.call.m16_static1_d	0+[0-9a-f]+ .mips16.call.m16_static1_d
-0+[0-9a-f]+ l     F .mips16.call.m16_static1_d	0+[0-9a-f]+ __call_stub_m16_static1_d
-0+[0-9a-f]+ l    d  .mips16.call.m32_static1_dl	0+[0-9a-f]+ .mips16.call.m32_static1_dl
-0+[0-9a-f]+ l     F .mips16.call.m32_static1_dl	0+[0-9a-f]+ __call_stub_m32_static1_dl
-0+[0-9a-f]+ l    d  .mips16.call.m16_static1_dl	0+[0-9a-f]+ .mips16.call.m16_static1_dl
-0+[0-9a-f]+ l     F .mips16.call.m16_static1_dl	0+[0-9a-f]+ __call_stub_m16_static1_dl
-0+[0-9a-f]+ l    d  .mips16.call.m32_static1_dlld	0+[0-9a-f]+ .mips16.call.m32_static1_dlld
-0+[0-9a-f]+ l     F .mips16.call.m32_static1_dlld	0+[0-9a-f]+ __call_stub_m32_static1_dlld
-0+[0-9a-f]+ l    d  .mips16.call.m16_static1_dlld	0+[0-9a-f]+ .mips16.call.m16_static1_dlld
-0+[0-9a-f]+ l     F .mips16.call.m16_static1_dlld	0+[0-9a-f]+ __call_stub_m16_static1_dlld
-0+[0-9a-f]+ l    d  .mips16.call.fp.m32_static1_d_l	0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_l
-0+[0-9a-f]+ l     F .mips16.call.fp.m32_static1_d_l	0+[0-9a-f]+ __call_stub_fp_m32_static1_d_l
-0+[0-9a-f]+ l    d  .mips16.call.fp.m16_static1_d_l	0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_l
-0+[0-9a-f]+ l     F .mips16.call.fp.m16_static1_d_l	0+[0-9a-f]+ __call_stub_fp_m16_static1_d_l
-0+[0-9a-f]+ l    d  .mips16.call.fp.m32_static1_d_d	0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_d
-0+[0-9a-f]+ l     F .mips16.call.fp.m32_static1_d_d	0+[0-9a-f]+ __call_stub_fp_m32_static1_d_d
-0+[0-9a-f]+ l    d  .mips16.call.fp.m16_static1_d_d	0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_d
-0+[0-9a-f]+ l     F .mips16.call.fp.m16_static1_d_d	0+[0-9a-f]+ __call_stub_fp_m16_static1_d_d
-0+[0-9a-f]+ l    d  .mips16.call.m32_static16_d	0+[0-9a-f]+ .mips16.call.m32_static16_d
-0+[0-9a-f]+ l     F .mips16.call.m32_static16_d	0+[0-9a-f]+ __call_stub_m32_static16_d
-0+[0-9a-f]+ l    d  .mips16.call.m16_static16_d	0+[0-9a-f]+ .mips16.call.m16_static16_d
-0+[0-9a-f]+ l     F .mips16.call.m16_static16_d	0+[0-9a-f]+ __call_stub_m16_static16_d
-0+[0-9a-f]+ l    d  .mips16.call.m32_static16_dl	0+[0-9a-f]+ .mips16.call.m32_static16_dl
-0+[0-9a-f]+ l     F .mips16.call.m32_static16_dl	0+[0-9a-f]+ __call_stub_m32_static16_dl
-0+[0-9a-f]+ l    d  .mips16.call.m16_static16_dl	0+[0-9a-f]+ .mips16.call.m16_static16_dl
-0+[0-9a-f]+ l     F .mips16.call.m16_static16_dl	0+[0-9a-f]+ __call_stub_m16_static16_dl
-0+[0-9a-f]+ l    d  .mips16.call.m32_static16_dlld	0+[0-9a-f]+ .mips16.call.m32_static16_dlld
-0+[0-9a-f]+ l     F .mips16.call.m32_static16_dlld	0+[0-9a-f]+ __call_stub_m32_static16_dlld
-0+[0-9a-f]+ l    d  .mips16.call.m16_static16_dlld	0+[0-9a-f]+ .mips16.call.m16_static16_dlld
-0+[0-9a-f]+ l     F .mips16.call.m16_static16_dlld	0+[0-9a-f]+ __call_stub_m16_static16_dlld
-0+[0-9a-f]+ l    d  .mips16.call.fp.m32_static16_d_l	0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_l
-0+[0-9a-f]+ l     F .mips16.call.fp.m32_static16_d_l	0+[0-9a-f]+ __call_stub_fp_m32_static16_d_l
-0+[0-9a-f]+ l    d  .mips16.call.fp.m16_static16_d_l	0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_l
-0+[0-9a-f]+ l     F .mips16.call.fp.m16_static16_d_l	0+[0-9a-f]+ __call_stub_fp_m16_static16_d_l
-0+[0-9a-f]+ l    d  .mips16.call.fp.m32_static16_d_d	0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_d
-0+[0-9a-f]+ l     F .mips16.call.fp.m32_static16_d_d	0+[0-9a-f]+ __call_stub_fp_m32_static16_d_d
-0+[0-9a-f]+ l    d  .mips16.call.fp.m16_static16_d_d	0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_d
-0+[0-9a-f]+ l     F .mips16.call.fp.m16_static16_d_d	0+[0-9a-f]+ __call_stub_fp_m16_static16_d_d
-#...
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_l
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_l
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_d
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_d
-#...
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_ld
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_ld
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_dl
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_dl
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_dlld
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_dlld
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_d_l
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_d_l
-#...
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ m32_d_d
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 m16_d_d
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ f32
-0+[0-9a-f]+ g     F .text	0+[0-9a-f]+ 0xf0 f16
+0+[0-9a-f]+ t __call_stub_fp_m16_static16_d_d
+0+[0-9a-f]+ t __call_stub_fp_m16_static16_d_l
+0+[0-9a-f]+ t __call_stub_fp_m16_static1_d_d
+0+[0-9a-f]+ t __call_stub_fp_m16_static1_d_l
+0+[0-9a-f]+ t __call_stub_fp_m32_static16_d_d
+0+[0-9a-f]+ t __call_stub_fp_m32_static16_d_l
+0+[0-9a-f]+ t __call_stub_fp_m32_static1_d_d
+0+[0-9a-f]+ t __call_stub_fp_m32_static1_d_l
+0+[0-9a-f]+ t __call_stub_m16_static16_d
+0+[0-9a-f]+ t __call_stub_m16_static16_dl
+0+[0-9a-f]+ t __call_stub_m16_static16_dlld
+0+[0-9a-f]+ t __call_stub_m16_static1_d
+0+[0-9a-f]+ t __call_stub_m16_static1_dl
+0+[0-9a-f]+ t __call_stub_m16_static1_dlld
+0+[0-9a-f]+ t __call_stub_m32_static16_d
+0+[0-9a-f]+ t __call_stub_m32_static16_dl
+0+[0-9a-f]+ t __call_stub_m32_static16_dlld
+0+[0-9a-f]+ t __call_stub_m32_static1_d
+0+[0-9a-f]+ t __call_stub_m32_static1_dl
+0+[0-9a-f]+ t __call_stub_m32_static1_dlld
+0+[0-9a-f]+ t __fn_stub_m16_d
+0+[0-9a-f]+ t __fn_stub_m16_d_d
+0+[0-9a-f]+ t __fn_stub_m16_dl
+0+[0-9a-f]+ t __fn_stub_m16_dlld
+0+[0-9a-f]+ t __fn_stub_m16_static16_d
+0+[0-9a-f]+ t __fn_stub_m16_static16_d_d
+0+[0-9a-f]+ t __fn_stub_m16_static16_dl
+0+[0-9a-f]+ t __fn_stub_m16_static16_dlld
+0+[0-9a-f]+ t __fn_stub_m16_static1_d
+0+[0-9a-f]+ t __fn_stub_m16_static1_d_d
+0+[0-9a-f]+ t __fn_stub_m16_static1_dl
+0+[0-9a-f]+ t __fn_stub_m16_static1_dlld
+0+[0-9a-f]+ t __fn_stub_m16_static32_d
+0+[0-9a-f]+ t __fn_stub_m16_static32_d_d
+0+[0-9a-f]+ t __fn_stub_m16_static32_dl
+0+[0-9a-f]+ t __fn_stub_m16_static32_dlld
+0+[0-9a-f]+ t __fn_stub_m16_static_d
+0+[0-9a-f]+ t __fn_stub_m16_static_d_d
+0+[0-9a-f]+ t __fn_stub_m16_static_dl
+0+[0-9a-f]+ t __fn_stub_m16_static_dlld
+[ 	]+ U __mips16_adddf3
+[ 	]+ U __mips16_fixdfsi
+[ 	]+ U __mips16_floatsidf
+[ 	]+ U __mips16_ret_df
+0+[0-9a-f]+ T f16
+0+[0-9a-f]+ T f32
+0+[0-9a-f]+ T m16_d
+0+[0-9a-f]+ T m16_d_d
+0+[0-9a-f]+ T m16_d_l
+0+[0-9a-f]+ T m16_dl
+0+[0-9a-f]+ T m16_dlld
+0+[0-9a-f]+ T m16_l
+0+[0-9a-f]+ T m16_ld
+0+[0-9a-f]+ t m16_static16_d
+0+[0-9a-f]+ t m16_static16_d_d
+0+[0-9a-f]+ t m16_static16_d_l
+0+[0-9a-f]+ t m16_static16_dl
+0+[0-9a-f]+ t m16_static16_dlld
+0+[0-9a-f]+ t m16_static16_l
+0+[0-9a-f]+ t m16_static16_ld
+0+[0-9a-f]+ t m16_static1_d
+0+[0-9a-f]+ t m16_static1_d_d
+0+[0-9a-f]+ t m16_static1_d_l
+0+[0-9a-f]+ t m16_static1_dl
+0+[0-9a-f]+ t m16_static1_dlld
+0+[0-9a-f]+ t m16_static1_l
+0+[0-9a-f]+ t m16_static1_ld
+0+[0-9a-f]+ t m16_static32_d
+0+[0-9a-f]+ t m16_static32_d_d
+0+[0-9a-f]+ t m16_static32_d_l
+0+[0-9a-f]+ t m16_static32_dl
+0+[0-9a-f]+ t m16_static32_dlld
+0+[0-9a-f]+ t m16_static32_l
+0+[0-9a-f]+ t m16_static32_ld
+0+[0-9a-f]+ t m16_static_d
+0+[0-9a-f]+ t m16_static_d_d
+0+[0-9a-f]+ t m16_static_d_l
+0+[0-9a-f]+ t m16_static_dl
+0+[0-9a-f]+ t m16_static_dlld
+0+[0-9a-f]+ t m16_static_l
+0+[0-9a-f]+ t m16_static_ld
+0+[0-9a-f]+ T m32_d
+0+[0-9a-f]+ T m32_d_d
+0+[0-9a-f]+ T m32_d_l
+0+[0-9a-f]+ T m32_dl
+0+[0-9a-f]+ T m32_dlld
+0+[0-9a-f]+ T m32_l
+0+[0-9a-f]+ T m32_ld
+0+[0-9a-f]+ t m32_static16_d
+0+[0-9a-f]+ t m32_static16_d_d
+0+[0-9a-f]+ t m32_static16_d_l
+0+[0-9a-f]+ t m32_static16_dl
+0+[0-9a-f]+ t m32_static16_dlld
+0+[0-9a-f]+ t m32_static16_l
+0+[0-9a-f]+ t m32_static16_ld
+0+[0-9a-f]+ t m32_static1_d
+0+[0-9a-f]+ t m32_static1_d_d
+0+[0-9a-f]+ t m32_static1_d_l
+0+[0-9a-f]+ t m32_static1_dl
+0+[0-9a-f]+ t m32_static1_dlld
+0+[0-9a-f]+ t m32_static1_l
+0+[0-9a-f]+ t m32_static1_ld
+0+[0-9a-f]+ t m32_static32_d
+0+[0-9a-f]+ t m32_static32_d_d
+0+[0-9a-f]+ t m32_static32_d_l
+0+[0-9a-f]+ t m32_static32_dl
+0+[0-9a-f]+ t m32_static32_dlld
+0+[0-9a-f]+ t m32_static32_l
+0+[0-9a-f]+ t m32_static32_ld
+0+[0-9a-f]+ t m32_static_d
+0+[0-9a-f]+ t m32_static_d_d
+0+[0-9a-f]+ t m32_static_d_l
+0+[0-9a-f]+ t m32_static_dl
+0+[0-9a-f]+ t m32_static_dlld
+0+[0-9a-f]+ t m32_static_l
+0+[0-9a-f]+ t m32_static_ld
 #pass
diff --git a/gas/testsuite/gas/mips/mips64-mips3d-incl.d b/gas/testsuite/gas/mips/mips64-mips3d-incl.d
index 5da2a81..a64a529 100644
--- a/gas/testsuite/gas/mips/mips64-mips3d-incl.d
+++ b/gas/testsuite/gas/mips/mips64-mips3d-incl.d
@@ -2,6 +2,7 @@
 #name: MIPS MIPS64 MIPS-3D ASE instructions
 #source: mips64-mips3d.s
 #stderr: mips64-mips3d.l
+#as: -64
 
 # Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
 # Same as mips64-mips3d.d, but does not need -mips3d assembler
diff --git a/gas/testsuite/gas/mips/octeon.d b/gas/testsuite/gas/mips/octeon.d
index 73c4bee..5e32ae6 100644
--- a/gas/testsuite/gas/mips/octeon.d
+++ b/gas/testsuite/gas/mips/octeon.d
@@ -1,4 +1,4 @@
-#as: -march=octeon
+#as: -march=octeon -64
 #objdump: -M reg-names=numeric -dr
 #name: MIPS octeon instructions
 
diff --git a/gas/testsuite/gas/mips/sb1-ext-mdmx.d b/gas/testsuite/gas/mips/sb1-ext-mdmx.d
index 75b89dd..318e363 100644
--- a/gas/testsuite/gas/mips/sb1-ext-mdmx.d
+++ b/gas/testsuite/gas/mips/sb1-ext-mdmx.d
@@ -1,6 +1,6 @@
 #objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1
 #name: SB-1 MDMX subset and extensions
-#as: -march=sb1
+#as: -march=sb1 -64
 
 # Check SB-1 MDMX subset and extensions assembly and disassembly
 
diff --git a/gas/testsuite/gas/mips/sb1-ext-ps.d b/gas/testsuite/gas/mips/sb1-ext-ps.d
index cb09e55..b9ccfac 100644
--- a/gas/testsuite/gas/mips/sb1-ext-ps.d
+++ b/gas/testsuite/gas/mips/sb1-ext-ps.d
@@ -1,6 +1,6 @@
 #objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1
 #name: SB-1 paired single extensions
-#as: -march=sb1
+#as: -march=sb1 -64
 
 .*: +file format .*mips.*
 
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 39c108c..47057ee 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -34,7 +34,6 @@ if { [istarget powerpc*-*-*] } then {
     if { [istarget powerpc-*-*aix*] } then {
 	run_dump_test "altivec_xcoff"
 	run_dump_test "altivec_xcoff64"
-	run_dump_test "booke_xcoff"
     } else {
 	run_dump_test "altivec"
 	run_dump_test "altivec_and_spe"
diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp
index 5afb3b9..1e02847 100644
--- a/gas/testsuite/lib/gas-defs.exp
+++ b/gas/testsuite/lib/gas-defs.exp
@@ -1,5 +1,5 @@
 # Copyright (C) 1993, 1994, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
-# 2004, 2005, 2007 Free Software Foundation, Inc.
+# 2004, 2005, 2007, 2009  Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -371,19 +371,16 @@ proc run_dump_tests { testcases {extra_options {}} } {
 #   as: FLAGS
 #	When assembling FILE.s, pass FLAGS to the assembler.
 #
-#   PROG: PROGRAM-NAME
-#       The name of the program to run to analyze the .o file produced
-#       by the assembler.  This can be omitted; run_dump_test will guess
-#       which program to run by seeing which of the flags options below
-#	is present.
-#
-#   objdump: FLAGS
 #   nm: FLAGS
 #   objcopy: FLAGS
+#   objdump: FLAGS
+#   readelf: FLAGS
 #	Use the specified program to analyze the .o file, and pass it
 #	FLAGS, in addition to the .o file name.  Note that they are run
 #	with LC_ALL=C in the environment to give consistent sorting
-#	of symbols.
+#	of symbols.  If no FLAGS are needed then use:
+#        PROG: [nm objcopy objdump readelf]
+#       instead.
 #
 #   source: SOURCE
 #	Assemble the file SOURCE.s.  If omitted, this defaults to FILE.s.