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author | Sergey Belyashov <sergey.belyashov@gmail.com> | 2020-01-02 14:10:40 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2020-01-02 14:14:59 +0000 |
commit | 6655dba246bd164d953fe220a0e3d4eed85bb268 (patch) | |
tree | 423258b5dadb447dc649e71c6ce48aaeed8ba385 /gas/testsuite/gas/z80/z180.d | |
parent | 0db131fb835e4c4f6a024e86743467e7e01c965e (diff) | |
download | gdb-6655dba246bd164d953fe220a0e3d4eed85bb268.zip gdb-6655dba246bd164d953fe220a0e3d4eed85bb268.tar.gz gdb-6655dba246bd164d953fe220a0e3d4eed85bb268.tar.bz2 |
Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. Add an ELF based target for these as well.
PR 25224
bfd * Makefile.am: Add z80-elf target support.
* configure.ac: Likewise.
* targets.c: Likewise.
* config.bfd: Add z80-elf target support and new arches: ez80 and z180.
* elf32-z80.c: New file.
* archures.c: Add new z80 architectures: eZ80 and Z180.
* coffcode.h: Likewise.
* cpu-z80.c: Likewise.
* bfd-in2.h: Likewise plus additional Z80 relocations.
* coff-z80.c: Add new relocations for Z80 target and local label check.
gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support
for assembler code generated by SDCC. Add new relocation types. Add
z80-elf target support.
* config/tc-z80.h: Add z80-elf target support. Enable dollar local
labels. Local labels starts from ".L".
* testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
* testsuite/gas/all/fwdexp.s: Likewise.
* testsuite/gas/z80/suffix.d: Fix failure on ELF target.
* testsuite/gas/z80/z80.exp: Add new tests
* testsuite/gas/z80/dollar.d: New file.
* testsuite/gas/z80/dollar.s: New file.
* testsuite/gas/z80/ez80_adl_all.d: New file.
* testsuite/gas/z80/ez80_adl_all.s: New file.
* testsuite/gas/z80/ez80_adl_suf.d: New file.
* testsuite/gas/z80/ez80_isuf.s: New file.
* testsuite/gas/z80/ez80_z80_all.d: New file.
* testsuite/gas/z80/ez80_z80_all.s: New file.
* testsuite/gas/z80/ez80_z80_suf.d: New file.
* testsuite/gas/z80/r800_extra.d: New file.
* testsuite/gas/z80/r800_extra.s: New file.
* testsuite/gas/z80/r800_ii8.d: New file.
* testsuite/gas/z80/r800_z80_doc.d: New file.
* testsuite/gas/z80/z180.d: New file.
* testsuite/gas/z80/z180.s: New file.
* testsuite/gas/z80/z180_z80_doc.d: New file.
* testsuite/gas/z80/z80_doc.d: New file.
* testsuite/gas/z80/z80_doc.s: New file.
* testsuite/gas/z80/z80_ii8.d: New file.
* testsuite/gas/z80/z80_ii8.s: New file.
* testsuite/gas/z80/z80_in_f_c.d: New file.
* testsuite/gas/z80/z80_in_f_c.s: New file.
* testsuite/gas/z80/z80_op_ii_ld.d: New file.
* testsuite/gas/z80/z80_op_ii_ld.s: New file.
* testsuite/gas/z80/z80_out_c_0.d: New file.
* testsuite/gas/z80/z80_out_c_0.s: New file.
* testsuite/gas/z80/z80_reloc.d: New file.
* testsuite/gas/z80/z80_reloc.s: New file.
* testsuite/gas/z80/z80_sli.d: New file.
* testsuite/gas/z80/z80_sli.s: New file.
ld * Makefile.am: Add new target z80-elf
* configure.tgt: Likewise.
* emultempl/z80.em: Add support for eZ80 and Z180 architectures.
* emulparams/elf32z80.sh: New file.
* emultempl/z80elf.em: Likewise.
* testsuite/ld-z80/arch_ez80_adl.d: Likewise.
* testsuite/ld-z80/arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/arch_r800.d: Likewise.
* testsuite/ld-z80/arch_z180.d: Likewise.
* testsuite/ld-z80/arch_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_z180.d: Likewise.
* testsuite/ld-z80/labels.s: Likewise.
* testsuite/ld-z80/relocs.s: Likewise.
* testsuite/ld-z80/relocs_b_ez80.d: Likewise.
* testsuite/ld-z80/relocs_b_z80.d: Likewise.
* testsuite/ld-z80/relocs_f_z80.d: Likewise.
* testsuite/ld-z80/z80.exp: Likewise.
opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
Diffstat (limited to 'gas/testsuite/gas/z80/z180.d')
-rw-r--r-- | gas/testsuite/gas/z80/z180.d | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/gas/testsuite/gas/z80/z180.d b/gas/testsuite/gas/z80/z180.d new file mode 100644 index 0000000..6f3f8f9 --- /dev/null +++ b/gas/testsuite/gas/z80/z180.d @@ -0,0 +1,42 @@ +#as: -z180 +#objdump: -d +#name: Z180 specific instructions + +.*: .* + +Disassembly of section .text: + +0+ <.text>: +\s+0:\s+ed 38 05\s+in0 a,\(0x05\) +\s+3:\s+ed 00 05\s+in0 b,\(0x05\) +\s+6:\s+ed 08 05\s+in0 c,\(0x05\) +\s+9:\s+ed 10 05\s+in0 d,\(0x05\) +\s+c:\s+ed 18 05\s+in0 e,\(0x05\) +\s+f:\s+ed 20 05\s+in0 h,\(0x05\) +\s+12:\s+ed 28 05\s+in0 l,\(0x05\) +\s+15:\s+ed 39 05\s+out0 \(0x05\),a +\s+18:\s+ed 01 05\s+out0 \(0x05\),b +\s+1b:\s+ed 09 05\s+out0 \(0x05\),c +\s+1e:\s+ed 11 05\s+out0 \(0x05\),d +\s+21:\s+ed 19 05\s+out0 \(0x05\),e +\s+24:\s+ed 21 05\s+out0 \(0x05\),h +\s+27:\s+ed 29 05\s+out0 \(0x05\),l +\s+2a:\s+ed 4c\s+mlt bc +\s+2c:\s+ed 5c\s+mlt de +\s+2e:\s+ed 6c\s+mlt hl +\s+30:\s+ed 7c\s+mlt sp +\s+32:\s+ed 3c\s+tst a +\s+34:\s+ed 04\s+tst b +\s+36:\s+ed 0c\s+tst c +\s+38:\s+ed 14\s+tst d +\s+3a:\s+ed 1c\s+tst e +\s+3c:\s+ed 24\s+tst h +\s+3e:\s+ed 2c\s+tst l +\s+40:\s+ed 34\s+tst \(hl\) +\s+42:\s+ed 64 0f\s+tst 0x0f +\s+45:\s+ed 74 f0\s+tstio 0xf0 +\s+48:\s+ed 76\s+slp +\s+4a:\s+ed 83\s+otim +\s+4c:\s+ed 8b\s+otdm +\s+4e:\s+ed 93\s+otimr +\s+50:\s+ed 9b\s+otdmr |