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authorAndreas Krebbel <krebbel@linux.ibm.com>2019-01-31 17:01:27 +0100
committerAndreas Krebbel <krebbel@linux.ibm.com>2019-01-31 17:32:18 +0100
commitfc60b8c806a641cc2260c8b26f389f2abdc99dda (patch)
tree59e9031056dd9138abc88c06dd8d41cf4e584f35 /gas/doc
parent3ca4a8eca78b4d5e3fa308dbd21c67ebef09a261 (diff)
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S/390: Implement instruction set extensions
opcodes/ChangeLog: 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com> * s390-mkopc.c (main): Accept arch13 as cpu string. * s390-opc.c: Add new instruction formats and instruction opcode masks. * s390-opc.txt: Add new arch13 instructions. include/ChangeLog: 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com> * opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_ARCH13. gas/ChangeLog: 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com> * config/tc-s390.c (s390_parse_cpu): New entry for arch13. * doc/c-s390.texi: Document arch13 march option. * testsuite/gas/s390/s390.exp: Run the arch13 related tests. * testsuite/gas/s390/zarch-arch13.d: New test. * testsuite/gas/s390/zarch-arch13.s: New test. * testsuite/gas/s390/zarch-z13.d: Expect the renamed mnemonics also for z13.
Diffstat (limited to 'gas/doc')
-rw-r--r--gas/doc/c-s390.texi8
1 files changed, 5 insertions, 3 deletions
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index 0b93723..27fa317 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture modes are the Enterprise System
Architecture (ESA) and the newer z/Architecture mode. The chip levels
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
-(or arch11), and z14 (or arch12).
+(or arch11), z14 (or arch12), and arch13.
@menu
* s390 Options:: Command-line Options.
@@ -68,8 +68,10 @@ are recognized:
@code{z9-ec} (or @code{arch7}),
@code{z10} (or @code{arch8}),
@code{z196} (or @code{arch9}),
-@code{zEC12} (or @code{arch10}) and
-@code{z13} (or @code{arch11}).
+@code{zEC12} (or @code{arch10}),
+@code{z13} (or @code{arch11}),
+@code{z14} (or @code{arch12}), and
+@code{arch13}).
Assembling an instruction that is not supported on the target
processor results in an error message.