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| author | Christoph Müllner <christoph.muellner@vrull.eu> | 2022-06-28 17:44:57 +0200 |
|---|---|---|
| committer | Philipp Tomsich <philipp.tomsich@vrull.eu> | 2022-09-22 18:06:09 +0200 |
| commit | f511f80fa3fcaf6bcbe727fb902b8bd5ec8f9c20 (patch) | |
| tree | 6958b2ab3024e997f728a7811ea0099a5f30df3f /gas/doc | |
| parent | 4041e11db3ec3611921d10150572a92689aa3154 (diff) | |
| download | gdb-f511f80fa3fcaf6bcbe727fb902b8bd5ec8f9c20.zip gdb-f511f80fa3fcaf6bcbe727fb902b8bd5ec8f9c20.tar.gz gdb-f511f80fa3fcaf6bcbe727fb902b8bd5ec8f9c20.tar.bz2 | |
RISC-V: Add T-Head FMemIdx vendor extension
T-Head has a range of vendor-specific instructions.
Therefore it makes sense to group them into smaller chunks
in form of vendor extensions.
This patch adds the XTheadFMemIdx extension, a collection of
T-Head-specific floating-point memory access instructions.
The 'th' prefix and the "XTheadFMemIdx" extension are documented
in a PR for the RISC-V toolchain conventions ([1]).
[1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19
Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-riscv.texi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index 401f7e4..392be0e 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -729,6 +729,11 @@ The XTheadCondMov extension provides instructions for conditional moves. It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}. +@item XTheadFMemIdx +The XTheadFMemIdx extension provides floating-point memory operations. + +It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}. + @item XTheadMac The XTheadMac extension provides multiply-accumulate instructions. |