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authorJan Beulich <jbeulich@suse.com>2022-10-12 18:03:43 +0200
committerJan Beulich <jbeulich@suse.com>2022-10-12 18:03:43 +0200
commitc0f327b81d1e46a9f860f3796eafc49d83b3d257 (patch)
treeddbd6b409348b3c8c56d4d9cea3fcb53081f1426 /gas/config
parentd955d17917cda6bf9950f1d6e9844d8797476d46 (diff)
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x86: drop "regmask" static variable
Replace its two uses by more direct checks, paralleling what's already there for SIMD registers.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-i386.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 6d04e83..01f84cb 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1907,7 +1907,6 @@ static const i386_operand_type disp16_32 = OPERAND_TYPE_DISP16_32;
static const i386_operand_type anydisp = OPERAND_TYPE_ANYDISP;
static const i386_operand_type anyimm = OPERAND_TYPE_ANYIMM;
static const i386_operand_type regxmm = OPERAND_TYPE_REGXMM;
-static const i386_operand_type regmask = OPERAND_TYPE_REGMASK;
static const i386_operand_type imm8 = OPERAND_TYPE_IMM8;
static const i386_operand_type imm8s = OPERAND_TYPE_IMM8S;
static const i386_operand_type imm16 = OPERAND_TYPE_IMM16;
@@ -8190,7 +8189,7 @@ build_modrm_byte (void)
|| ((op.bitfield.class != Reg
|| (!op.bitfield.dword && !op.bitfield.qword))
&& op.bitfield.class != RegSIMD
- && !operand_type_equal (&op, &regmask)))
+ && op.bitfield.class != RegMask))
abort ();
i.vex.register_specifier = i.op[vvvv].regs;
dest++;
@@ -8601,7 +8600,7 @@ build_modrm_byte (void)
if ((type->bitfield.class != Reg
|| (!type->bitfield.dword && !type->bitfield.qword))
&& type->bitfield.class != RegSIMD
- && !operand_type_equal (type, &regmask))
+ && type->bitfield.class != RegMask)
abort ();
i.vex.register_specifier = i.op[vex_reg].regs;