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author | Jan Beulich <jbeulich@suse.com> | 2020-06-25 09:25:12 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-06-25 09:25:12 +0200 |
commit | 40d231b4fbcb68d5906a949acd1d421123d74082 (patch) | |
tree | b3cdd402b4ecf3d5c012959846ea9b2a7a3756ab /gas/config | |
parent | 11abe4264708e70413de9eeb2cbe14ac71e304db (diff) | |
download | gdb-40d231b4fbcb68d5906a949acd1d421123d74082.zip gdb-40d231b4fbcb68d5906a949acd1d421123d74082.tar.gz gdb-40d231b4fbcb68d5906a949acd1d421123d74082.tar.bz2 |
x86: also refuse data size prefix on SIMD insns
The data size prefix alters the meaning of legacy encoded SIMD insns,
and hence shouldn't be accepted there. Use of it also leads to
inconsistencies in SSE2AVX mode. Don't match insns with data size prefix
against SSE2AVX templates.
Diffstat (limited to 'gas/config')
-rw-r--r-- | gas/config/tc-i386.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 18f4a24..5a652a9 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1944,7 +1944,8 @@ cpu_flags_match (const insn_template *t) { /* We need to check a few extra flags with AVX. */ if (cpu.bitfield.cpuavx - && (!t->opcode_modifier.sse2avx || sse2avx) + && (!t->opcode_modifier.sse2avx + || (sse2avx && !i.prefix[DATA_PREFIX])) && (!x.bitfield.cpuaes || cpu.bitfield.cpuaes) && (!x.bitfield.cpugfni || cpu.bitfield.cpugfni) && (!x.bitfield.cpupclmul || cpu.bitfield.cpupclmul)) @@ -4787,8 +4788,11 @@ md_assemble (char *line) return; } - /* Check for data size prefix on VEX/XOP/EVEX encoded insns. */ - if (i.prefix[DATA_PREFIX] && is_any_vex_encoding (&i.tm)) + /* Check for data size prefix on VEX/XOP/EVEX encoded and SIMD insns. */ + if (i.prefix[DATA_PREFIX] + && (is_any_vex_encoding (&i.tm) + || i.tm.operand_types[i.imm_operands].bitfield.class >= RegMMX + || i.tm.operand_types[i.imm_operands + 1].bitfield.class >= RegMMX)) { as_bad (_("data size prefix invalid with `%s'"), i.tm.name); return; |