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authorNick Clifton <nickc@redhat.com>2012-05-03 13:12:08 +0000
committerNick Clifton <nickc@redhat.com>2012-05-03 13:12:08 +0000
commitf6c1a2d592af15d02c7fc93390af3c803e74c4d9 (patch)
tree760746b562a8f05f3ea3b8f163304c59ba7b96db /bfd
parenta8acc5fb18af9d4b0da318218680534414325e13 (diff)
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Add support for Motorola XGATE embedded CPU
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog20
-rw-r--r--bfd/bfd-in2.h55
-rw-r--r--bfd/config.bfd8
-rwxr-xr-xbfd/configure1
-rw-r--r--bfd/configure.in1
-rw-r--r--bfd/elf-bfd.h1
-rw-r--r--bfd/libbfd.h12
-rw-r--r--bfd/reloc.c64
-rw-r--r--bfd/targets.c2
9 files changed, 161 insertions, 3 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 4167a0d..733c546 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,23 @@
+2012-05-03 Sean Keys <skeys@ipdatasys.com>
+
+ * cpu-xgate.c: New file. Added XGATE support.
+ * archures.c (bfd_architecture): Add XGATE architecture.
+ (bfd_archures_list): Add reference to XGATE architecture info.
+ * elf-bfd.h (prep_headers): Handle bfd_arch_xgate.
+ * reloc.c: Add various XGATE relocation enums.
+ * targets.c (bfd_elf32_xgate_vec): Declare and add to target vector
+ list.
+ * Makefile.am: Add support for XGATE elf.
+ * configure.in: Ditto.
+ * config.bfd: Ditto.
+ * Makefile.in: Regenerate.
+ * configure: Ditto.
+ * bfd-in2.h: Ditto.
+ * libbfd.h: Ditto.
+ Added files for XGATE relocations.
+ * elf32-xgate.c: Created minimal relocation file.
+ * elf32-xgate.h: Created minimal header file for elf32-xgate.
+
2012-05-03 Tristan Gingold <gingold@adacore.com>
* dwarf2.c (decode_line_info): Ignore
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 17dbbe1..6b94f72 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2141,7 +2141,9 @@ enum bfd_architecture
bfd_arch_xc16x, /* Infineon's XC16X Series. */
#define bfd_mach_xc16x 1
#define bfd_mach_xc16xl 2
-#define bfd_mach_xc16xs 3
+#define bfd_mach_xc16xs 3
+ bfd_arch_xgate, /* Freescale XGATE */
+#define bfd_mach_xgate 1
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
bfd_arch_z80,
@@ -4472,6 +4474,57 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */
This is the 5 bits of a value. */
BFD_RELOC_M68HC12_5B,
+/* Freescale XGATE reloc.
+This reloc marks the beginning of a bra/jal instruction. */
+ BFD_RELOC_XGATE_RL_JUMP,
+
+/* Freescale XGATE reloc.
+This reloc marks a group of several instructions that gcc generates
+and for which the linker relaxation pass can modify and/or remove
+some of them. */
+ BFD_RELOC_XGATE_RL_GROUP,
+
+/* Freescale XGATE reloc.
+This is the 16-bit lower part of an address. It is used for the '16-bit'
+instructions. */
+ BFD_RELOC_XGATE_LO16,
+
+/* Freescale XGATE reloc. */
+ BFD_RELOC_XGATE_GPAGE,
+
+/* Freescale XGATE reloc. */
+ BFD_RELOC_XGATE_24,
+
+/* Freescale XGATE reloc.
+This is a 9-bit pc-relative reloc. */
+ BFD_RELOC_XGATE_PCREL_9,
+
+/* Freescale XGATE reloc.
+This is a 10-bit pc-relative reloc. */
+ BFD_RELOC_XGATE_PCREL_10,
+
+/* Freescale XGATE reloc.
+This is the 16-bit lower part of an address. It is used for the '16-bit'
+instructions. */
+ BFD_RELOC_XGATE_IMM8_LO,
+
+/* Freescale XGATE reloc.
+This is the 16-bit higher part of an address. It is used for the '16-bit'
+instructions. */
+ BFD_RELOC_XGATE_IMM8_HI,
+
+/* Freescale XGATE reloc.
+This is a 3-bit pc-relative reloc. */
+ BFD_RELOC_XGATE_IMM3,
+
+/* Freescale XGATE reloc.
+This is a 4-bit pc-relative reloc. */
+ BFD_RELOC_XGATE_IMM4,
+
+/* Freescale XGATE reloc.
+This is a 5-bit pc-relative reloc. */
+ BFD_RELOC_XGATE_IMM5,
+
/* NS CR16C Relocations. */
BFD_RELOC_16C_NUM08,
BFD_RELOC_16C_NUM08_C,
diff --git a/bfd/config.bfd b/bfd/config.bfd
index ab72cf3..3f758c0 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -105,6 +105,7 @@ tilepro*) targ_archs=bfd_tilepro_arch ;;
v850*) targ_archs=bfd_v850_arch ;;
x86_64*) targ_archs=bfd_i386_arch ;;
xtensa*) targ_archs=bfd_xtensa_arch ;;
+xgate) targ_archs=bfd_xgate_arch ;;
z80|r800) targ_archs=bfd_z80_arch ;;
z8k*) targ_archs=bfd_z8k_arch ;;
*) targ_archs=bfd_${targ_cpu}_arch ;;
@@ -1576,7 +1577,12 @@ case "${targ}" in
w65-*-*)
targ_defvec=w65_vec
;;
-
+
+ xgate-*-*)
+ targ_defvec=bfd_elf32_xgate_vec
+ targ_selvecs="bfd_elf32_xgate_vec"
+ ;;
+
xstormy16-*-elf)
targ_defvec=bfd_elf32_xstormy16_vec
;;
diff --git a/bfd/configure b/bfd/configure
index fc5c9ad..7c52478 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -15332,6 +15332,7 @@ do
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf32_xc16x_vec) tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
+ bfd_elf32_xgate_vec) tb="$tb elf32-xgate.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
diff --git a/bfd/configure.in b/bfd/configure.in
index 3cb4b70..47631cc 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -818,6 +818,7 @@ do
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf32_xc16x_vec) tb="$tb elf32-xc16x.lo elf32.lo $elf" ;;
+ bfd_elf32_xgate_vec) tb="$tb elf32-xgate.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 4821eaf..5af924c 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -428,6 +428,7 @@ enum elf_target_id
TIC6X_ELF_DATA,
X86_64_ELF_DATA,
XTENSA_ELF_DATA,
+ XGATE_ELF_DATA,
TILEGX_ELF_DATA,
TILEPRO_ELF_DATA,
GENERIC_ELF_DATA
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index ab3c897..e4acdb0 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2093,6 +2093,18 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_M68HC11_PAGE",
"BFD_RELOC_M68HC11_24",
"BFD_RELOC_M68HC12_5B",
+ "BFD_RELOC_XGATE_RL_JUMP",
+ "BFD_RELOC_XGATE_RL_GROUP",
+ "BFD_RELOC_XGATE_LO16",
+ "BFD_RELOC_XGATE_GPAGE",
+ "BFD_RELOC_XGATE_24",
+ "BFD_RELOC_XGATE_PCREL_9",
+ "BFD_RELOC_XGATE_PCREL_10",
+ "BFD_RELOC_XGATE_IMM8_LO",
+ "BFD_RELOC_XGATE_IMM8_HI",
+ "BFD_RELOC_XGATE_IMM3",
+ "BFD_RELOC_XGATE_IMM4",
+ "BFD_RELOC_XGATE_IMM5",
"BFD_RELOC_16C_NUM08",
"BFD_RELOC_16C_NUM08_C",
"BFD_RELOC_16C_NUM16",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 7aa9f96..0ec1b61 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -4979,7 +4979,69 @@ ENUM
ENUMDOC
Motorola 68HC12 reloc.
This is the 5 bits of a value.
-
+ENUM
+ BFD_RELOC_XGATE_RL_JUMP
+ENUMDOC
+ Freescale XGATE reloc.
+ This reloc marks the beginning of a bra/jal instruction.
+ENUM
+ BFD_RELOC_XGATE_RL_GROUP
+ENUMDOC
+ Freescale XGATE reloc.
+ This reloc marks a group of several instructions that gcc generates
+ and for which the linker relaxation pass can modify and/or remove
+ some of them.
+ENUM
+ BFD_RELOC_XGATE_LO16
+ENUMDOC
+ Freescale XGATE reloc.
+ This is the 16-bit lower part of an address. It is used for the '16-bit'
+ instructions.
+ENUM
+ BFD_RELOC_XGATE_GPAGE
+ENUMDOC
+ Freescale XGATE reloc.
+ENUM
+ BFD_RELOC_XGATE_24
+ENUMDOC
+ Freescale XGATE reloc.
+ENUM
+ BFD_RELOC_XGATE_PCREL_9
+ENUMDOC
+ Freescale XGATE reloc.
+ This is a 9-bit pc-relative reloc.
+ENUM
+ BFD_RELOC_XGATE_PCREL_10
+ENUMDOC
+ Freescale XGATE reloc.
+ This is a 10-bit pc-relative reloc.
+ENUM
+ BFD_RELOC_XGATE_IMM8_LO
+ENUMDOC
+ Freescale XGATE reloc.
+ This is the 16-bit lower part of an address. It is used for the '16-bit'
+ instructions.
+ENUM
+ BFD_RELOC_XGATE_IMM8_HI
+ENUMDOC
+ Freescale XGATE reloc.
+ This is the 16-bit higher part of an address. It is used for the '16-bit'
+ instructions.
+ENUM
+ BFD_RELOC_XGATE_IMM3
+ENUMDOC
+ Freescale XGATE reloc.
+ This is a 3-bit pc-relative reloc.
+ENUM
+ BFD_RELOC_XGATE_IMM4
+ENUMDOC
+ Freescale XGATE reloc.
+ This is a 4-bit pc-relative reloc.
+ENUM
+ BFD_RELOC_XGATE_IMM5
+ENUMDOC
+ Freescale XGATE reloc.
+ This is a 5-bit pc-relative reloc.
ENUM
BFD_RELOC_16C_NUM08
ENUMX
diff --git a/bfd/targets.c b/bfd/targets.c
index 78b4288..f94fed5 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -717,6 +717,7 @@ extern const bfd_target bfd_elf32_us_cris_vec;
extern const bfd_target bfd_elf32_v850_vec;
extern const bfd_target bfd_elf32_vax_vec;
extern const bfd_target bfd_elf32_xc16x_vec;
+extern const bfd_target bfd_elf32_xgate_vec;
extern const bfd_target bfd_elf32_xstormy16_vec;
extern const bfd_target bfd_elf32_xtensa_be_vec;
extern const bfd_target bfd_elf32_xtensa_le_vec;
@@ -1090,6 +1091,7 @@ static const bfd_target * const _bfd_target_vector[] =
&bfd_elf32_v850_vec,
&bfd_elf32_vax_vec,
&bfd_elf32_xc16x_vec,
+ &bfd_elf32_xgate_vec,
&bfd_elf32_xstormy16_vec,
&bfd_elf32_xtensa_be_vec,
&bfd_elf32_xtensa_le_vec,