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| author | Andreas Krebbel <krebbel@linux.ibm.com> | 2024-02-27 14:01:41 +0100 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.ibm.com> | 2024-02-27 14:07:17 +0100 |
| commit | 896a639babe2d883467978abce7a4c55bc9f00ed (patch) | |
| tree | a34555d413cf1725e980564cef66f03bcfda3cfa /bfd | |
| parent | d6a14e41381d0aa0a99c6796d3bd3677c80dfe06 (diff) | |
| download | gdb-896a639babe2d883467978abce7a4c55bc9f00ed.zip gdb-896a639babe2d883467978abce7a4c55bc9f00ed.tar.gz gdb-896a639babe2d883467978abce7a4c55bc9f00ed.tar.bz2 | |
s390: Avoid reloc overflows on undefined weak symbols
Replace relative long addressing instructions of weak symbols, which
will definitely resolve to zero, with either a load address of 0, a
NOP, or a trapping insn.
This prevents the PC32DBL relocation from overflowing in case the
binary will be loaded at 4GB or more.
bfd/ChangeLog:
* bfd/elf64-s390.c (elf_s390_relocate_section): Replace
instructions using undefined weak symbols with relative addressing
to avoid relocation overflows.
ld/ChangeLog:
* ld/testsuite/ld-s390/s390.exp:
* ld/testsuite/ld-s390/8GB.ld: New test.
* ld/testsuite/ld-s390/weakundef-1.dd: New test.
* ld/testsuite/ld-s390/weakundef-1.s: New test.
Diffstat (limited to 'bfd')
| -rw-r--r-- | bfd/elf64-s390.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c index ab9ec3f..74ac018 100644 --- a/bfd/elf64-s390.c +++ b/bfd/elf64-s390.c @@ -2475,6 +2475,60 @@ elf_s390_relocate_section (bfd *output_bfd, + h->plt.offset); goto do_relocation; } + + /* Replace relative long addressing instructions of weak + symbols, which will definitely resolve to zero, with + either a load address of 0, a NOP, or a trapping insn. + This prevents the PC32DBL relocation from overflowing in + case the binary will be loaded at 4GB or more. */ + if (h != NULL + && h->root.type == bfd_link_hash_undefweak + && !h->root.linker_def + && (bfd_link_executable (info) + || ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) + && r_type == R_390_PC32DBL) + { + void *insn_start = contents + rel->r_offset - 2; + uint16_t op = bfd_get_16 (input_bfd, insn_start) & 0xff0f; + uint8_t reg = bfd_get_8 (input_bfd, insn_start + 1) & 0xf0; + + /* NOTE: The order of the if's is important! */ + /* Replace load address relative long (larl) with load + address (lay) */ + if (op == 0xc000) + { + /* larl rX,<weak sym> -> lay rX,0(0) */ + bfd_put_16 (output_bfd, 0xe300 | reg, insn_start); + bfd_put_32 (output_bfd, 0x71, insn_start + 2); + continue; + } + /* Replace prefetch data relative long (pfdrl) with a NOP */ + else if (op == 0xc602) + { + /* Emit a 6-byte NOP: jgnop . */ + bfd_put_16 (output_bfd, 0xc004, insn_start); + bfd_put_32 (output_bfd, 0x0, insn_start + 2); + continue; + } + /* Replace the following instructions with a trap: + - branch relative and save long (brasl) + - load (logical) relative long (lrl, lgrl, lgfrl, llgfrl) + - load (logical) halfword relative long (lhrl, lghrl, llhrl, llghrl) + - store relative long (strl, stgrl) + - store halfword relative long (sthrl) + - execute relative long (exrl) + - compare (logical) relative long (crl, clrl, cgrl, clgrl, cgfrl, clgfrl) + - compare (logical) halfword relative long (chrl, cghrl, clhrl, clghrl) + - branch relative on count high (brcth) */ + else if (op == 0xc005 || (op & 0xff00) == 0xc400 + || (op & 0xff00) == 0xc600 || op == 0xcc06) + { + /* Emit a 6-byte trap: jg .+2 */ + bfd_put_16 (output_bfd, 0xc0f4, insn_start); + bfd_put_32 (output_bfd, 0x1, insn_start + 2); + continue; + } + } /* Fall through. */ case R_390_8: |