* bfd.c (bfd_get_sign_extend_vma): Add cases for pe-arm-little and pei-arm-little.

* coff-arm.c (coff_arm_rtype_to_howto) [COFF_WITH_PE]: Handle ARM_SECREL.
  (coff_arm_reloc_type_lookup): Map BFD_RELOC_32_SECREL to  ARM_SECREL.
* pe-arm.c [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
* pei-arm.c [TARGET_UNDERSCORE]: Define for ARM_WINCE like in pe-arm.c.
  [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.

* config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF only block.
  (pe_directive_secrel) [TE_PE]: New function.
  (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file, loc, loc_mark_labels.
  [TE_PE]: Handle secrel32.
  (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn call.
  (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
  (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
  (md_section_align): Only round section sizes here for AOUT targets.
  (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
  (tc_pe_dwarf2_emit_offset): New function.
  (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
  (cons_fix_new_arm): Handle O_secrel.
* config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out of OBJ_ELF only block.
  [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare tc_pe_dwarf2_emit_offset.

* ld-pe/pe.exp: Enable tests on arm-wince-pe.
* ld-pe/secrel.d: Adjust test to work on arm-wince-pe too.

11 files changed, 237 insertions, 50 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 0ba154d..253b7c0 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,16 @@
+2006-08-05  Pedro Alves  <pedro_alves@portugalmail.pt>
+
+	* bfd.c (bfd_get_sign_extend_vma): Add cases for pe-arm-little
+	and pei-arm-little.
+	* coff-arm.c (coff_arm_rtype_to_howto) [COFF_WITH_PE]: Handle
+	ARM_SECREL.
+	(coff_arm_reloc_type_lookup): Map BFD_RELOC_32_SECREL to
+	ARM_SECREL.
+	* pe-arm.c [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
+	* pei-arm.c [TARGET_UNDERSCORE]: Define for ARM_WINCE like in
+	pe-arm.c.
+	[COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
+
 2006-08-04  Marcelo Tosatti  <marcelo@kvack.org>
 
 	* elflink.c (elf_gc_sweep): If info.print_gc_sections is true,
diff --git a/bfd/bfd.c b/bfd/bfd.c
index a2d4ae9..cc0f73e 100644
--- a/bfd/bfd.c
+++ b/bfd/bfd.c
@@ -883,7 +883,9 @@ bfd_get_sign_extend_vma (bfd *abfd)
      a place will have to be found.  Until then, this hack will do.  */
   if (strncmp (name, "coff-go32", sizeof ("coff-go32") - 1) == 0
       || strcmp (name, "pe-i386") == 0
-      || strcmp (name, "pei-i386") == 0)
+      || strcmp (name, "pei-i386") == 0
+      || strcmp (name, "pe-arm-little") == 0
+      || strcmp (name, "pei-arm-little") == 0)
     return 1;
 
   bfd_set_error (bfd_error_wrong_format);
diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c
index ff4b239..91b2634 100644
--- a/bfd/coff-arm.c
+++ b/bfd/coff-arm.c
@@ -539,6 +539,32 @@ coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
   if (rel->r_type == ARM_RVA32)
     *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
 
+#ifdef COFF_WITH_PE
+  if (rel->r_type == ARM_SECREL)
+    {
+      bfd_vma osect_vma;
+
+      if (h && (h->type == bfd_link_hash_defined
+		|| h->type == bfd_link_hash_defweak))
+	osect_vma = h->root.u.def.section->output_section->vma;
+      else
+	{
+	  asection *sec;
+	  int i;
+
+	  /* Sigh, the only way to get the section to offset against
+	     is to find it the hard way.  */
+
+	  for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
+	    sec = sec->next;
+
+	  osect_vma = sec->output_section->vma;
+	}
+
+      *addendp -= osect_vma;
+    }
+#endif
+
   return howto;
 }
 
@@ -808,6 +834,7 @@ coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
       ASTD (BFD_RELOC_RVA,                  ARM_RVA32);
       ASTD (BFD_RELOC_ARM_PCREL_BRANCH,     ARM_26);
       ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
+      ASTD (BFD_RELOC_32_SECREL,            ARM_SECREL);
 #else
       ASTD (BFD_RELOC_8,                    ARM_8);
       ASTD (BFD_RELOC_16,                   ARM_16);
diff --git a/bfd/pe-arm.c b/bfd/pe-arm.c
index dba9c1b..41c7ba9 100644
--- a/bfd/pe-arm.c
+++ b/bfd/pe-arm.c
@@ -44,4 +44,22 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 #define TARGET_UNDERSCORE 0
 #endif
 
+#define COFF_SECTION_ALIGNMENT_ENTRIES \
+{ COFF_SECTION_NAME_EXACT_MATCH (".bss"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".data"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".rdata"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".text"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".idata"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".pdata"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".debug"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.wi."), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }
+
 #include "coff-arm.c"
diff --git a/bfd/pei-arm.c b/bfd/pei-arm.c
index 38d3367..cba19de 100644
--- a/bfd/pei-arm.c
+++ b/bfd/pei-arm.c
@@ -32,4 +32,26 @@ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 #define PCRELOFFSET        TRUE
 #define COFF_LONG_SECTION_NAMES
 
+#ifdef ARM_WINCE
+# define TARGET_UNDERSCORE 0
+#endif
+
+#define COFF_SECTION_ALIGNMENT_ENTRIES \
+{ COFF_SECTION_NAME_EXACT_MATCH (".bss"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".data"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".rdata"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".text"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".idata"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_EXACT_MATCH (".pdata"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".debug"), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }, \
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.wi."), \
+  COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }
+
 #include "coff-arm.c"
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5076bad..5cd43bb 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,27 @@
+2006-08-05  Pedro Alves  <pedro_alves@portugalmail.pt>
+
+	* config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
+	only block.
+	(pe_directive_secrel) [TE_PE]: New function.
+	(md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
+	loc, loc_mark_labels.
+	[TE_PE]: Handle secrel32.
+	(output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
+	call.
+	(output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
+	(arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
+	(md_section_align): Only round section sizes here for AOUT
+	targets.
+	(tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
+	(tc_pe_dwarf2_emit_offset): New function.
+	(md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
+	(cons_fix_new_arm): Handle O_secrel.
+	* config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
+	DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
+	of OBJ_ELF only block.
+	[TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
+	tc_pe_dwarf2_emit_offset.
+
 2006-08-04  Richard Sandiford  <richard@codesourcery.com>
 
 	* config/tc-sh.c (apply_full_field_fix): New function.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9bf1439..a0d3a63 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -37,10 +37,11 @@
 
 #ifdef OBJ_ELF
 #include "elf/arm.h"
-#include "dwarf2dbg.h"
 #include "dw2gencfi.h"
 #endif
 
+#include "dwarf2dbg.h"
+
 /* XXX Set this to 1 after the next binutils release.  */
 #define WARN_DEPRECATED 0
 
@@ -3878,6 +3879,28 @@ static void s_arm_arch (int);
 static void s_arm_cpu (int);
 static void s_arm_fpu (int);
 
+#ifdef TE_PE
+
+static void
+pe_directive_secrel (int dummy ATTRIBUTE_UNUSED) 
+{
+  expressionS exp;
+
+  do
+    {
+      expression (&exp);
+      if (exp.X_op == O_symbol)
+	exp.X_op = O_secrel;
+
+      emit_expr (&exp, 4);
+    }
+  while (*input_line_pointer++ == ',');
+
+  input_line_pointer--;
+  demand_empty_rest_of_line ();
+}
+#endif /* TE_PE */
+
 /* This table describes all the machine specific pseudo-ops the assembler
    has to support.  The fields are:
      pseudo-op name without dot
@@ -3926,10 +3949,22 @@ const pseudo_typeS md_pseudo_table[] =
   { "eabi_attribute",	s_arm_eabi_attribute,	0 },
 #else
   { "word",	   cons, 4},
+
+  /* These are used for dwarf.  */
+  {"2byte", cons, 2},
+  {"4byte", cons, 4},
+  {"8byte", cons, 8},
+  /* These are used for dwarf2.  */
+  { "file", (void (*) (int)) dwarf2_directive_file, 0 },
+  { "loc",  dwarf2_directive_loc,  0 },
+  { "loc_mark_labels", dwarf2_directive_loc_mark_labels, 0 },
 #endif
   { "extend",	   float_cons, 'x' },
   { "ldouble",	   float_cons, 'x' },
   { "packed",	   float_cons, 'p' },
+#ifdef TE_PE
+  {"secrel32", pe_directive_secrel, 0},
+#endif
   { 0, 0, 0 }
 };
 
@@ -13381,11 +13416,9 @@ output_relax_insn (void)
   symbolS *sym;
   int offset;
 
-#ifdef OBJ_ELF
   /* The size of the instruction is unknown, so tie the debug info to the
      start of the instruction.  */
   dwarf2_emit_insn (0);
-#endif
 
   switch (inst.reloc.exp.X_op)
     {
@@ -13453,9 +13486,7 @@ output_inst (const char * str)
 		 inst.size, & inst.reloc.exp, inst.reloc.pc_rel,
 		 inst.reloc.type);
 
-#ifdef OBJ_ELF
   dwarf2_emit_insn (inst.size);
-#endif
 }
 
 /* Tag values used in struct asm_opcode's tag field.  */
@@ -13906,9 +13937,7 @@ arm_frob_label (symbolS * sym)
       label_is_thumb_function_name = FALSE;
     }
 
-#ifdef OBJ_ELF
   dwarf2_emit_label (sym);
-#endif
 }
 
 int
@@ -16379,12 +16408,22 @@ valueT
 md_section_align (segT	 segment ATTRIBUTE_UNUSED,
 		  valueT size)
 {
-#ifdef OBJ_ELF
-  return size;
-#else
-  /* Round all sects to multiple of 4.	*/
-  return (size + 3) & ~3;
+#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
+  if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
+    {
+      /* For a.out, force the section size to be aligned.  If we don't do
+	 this, BFD will align it for us, but it will not write out the
+	 final bytes of the section.  This may be a bug in BFD, but it is
+	 easier to fix it here since that is how the other a.out targets
+	 work.  */
+      int align;
+
+      align = bfd_get_section_alignment (stdoutput, segment);
+      size = ((size + (1 << align) - 1) & ((valueT) -1 << align));
+    }
 #endif
+
+  return size;
 }
 
 /* This is called from HANDLE_ALIGN in write.c.	 Fill in the contents
@@ -16884,6 +16923,16 @@ create_unwind_entry (int have_data)
   return 0;
 }
 
+
+/* Initialize the DWARF-2 unwind information for this procedure.  */
+
+void
+tc_arm_frame_initial_instructions (void)
+{
+  cfi_add_CFA_def_cfa (REG_SP, 0);
+}
+#endif /* OBJ_ELF */
+
 /* Convert REGNAME to a DWARF-2 register number.  */
 
 int
@@ -16897,15 +16946,18 @@ tc_arm_regname_to_dw2regnum (char *regname)
   return reg;
 }
 
-/* Initialize the DWARF-2 unwind information for this procedure.  */
-
+#ifdef TE_PE
 void
-tc_arm_frame_initial_instructions (void)
+tc_pe_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
 {
-  cfi_add_CFA_def_cfa (REG_SP, 0);
-}
-#endif /* OBJ_ELF */
+  expressionS expr;
 
+  expr.X_op = O_secrel;
+  expr.X_add_symbol = symbol;
+  expr.X_add_number = 0;
+  emit_expr (&expr, size);
+}
+#endif
 
 /* MD interface: Symbol and relocation handling.  */
 
@@ -17897,6 +17949,9 @@ md_apply_fix (fixS *	fixP,
     case BFD_RELOC_ARM_ROSEGREL32:
     case BFD_RELOC_ARM_SBREL32:
     case BFD_RELOC_32_PCREL:
+#ifdef TE_PE
+    case BFD_RELOC_32_SECREL:
+#endif
       if (fixP->fx_done || !seg->use_rela_p)
 #ifdef TE_WINCE
 	/* For WinCE we only do this for pcrel fixups.  */
@@ -18435,6 +18490,9 @@ tc_gen_reloc (asection *section, fixS *fixp)
     case BFD_RELOC_THUMB_PCREL_BLX:
     case BFD_RELOC_VTABLE_ENTRY:
     case BFD_RELOC_VTABLE_INHERIT:
+#ifdef TE_PE
+    case BFD_RELOC_32_SECREL:
+#endif
       code = fixp->fx_r_type;
       break;
 
@@ -18617,6 +18675,14 @@ cons_fix_new_arm (fragS *	frag,
       break;
     }
 
+#ifdef TE_PE
+  if (exp->X_op == O_secrel)
+  {
+    exp->X_op = O_symbol;
+    type = BFD_RELOC_32_SECREL;
+  }
+#endif
+
   fix_new_exp (frag, where, (int) size, exp, pcrel, type);
 }
 
diff --git a/gas/config/tc-arm.h b/gas/config/tc-arm.h
index 3f0abc8..c04a35b 100644
--- a/gas/config/tc-arm.h
+++ b/gas/config/tc-arm.h
@@ -175,8 +175,15 @@ extern void arm_md_end (void);
       goto LABEL;								\
     }
 
+#define DWARF2_LINE_MIN_INSN_LENGTH 	2
+
+/* The lr register is r14.  */
+#define DWARF2_DEFAULT_RETURN_COLUMN  14
+
+/* Registers are generally saved at negative offsets to the CFA.  */
+#define DWARF2_CIE_DATA_ALIGNMENT     -4
+
 #ifdef OBJ_ELF
-# define DWARF2_LINE_MIN_INSN_LENGTH 	2
 # define obj_frob_symbol(sym, punt)	armelf_frob_symbol ((sym), & (punt))
 # define md_elf_section_change_hook()	arm_elf_change_section ()
 # define md_elf_section_type(str, len)	arm_elf_section_type (str, len)
@@ -200,12 +207,6 @@ struct arm_segment_info_type
 /* We want .cfi_* pseudo-ops for generating unwind info.  */
 #define TARGET_USE_CFIPOP              1
 
-/* The lr register is r14.  */
-#define DWARF2_DEFAULT_RETURN_COLUMN  14
-
-/* Registers are generally saved at negative offsets to the CFA.  */
-#define DWARF2_CIE_DATA_ALIGNMENT     -4
-
 /* CFI hooks.  */
 #define tc_regname_to_dw2regnum            tc_arm_regname_to_dw2regnum
 #define tc_cfi_frame_initial_instructions  tc_arm_frame_initial_instructions
@@ -246,3 +247,12 @@ extern bfd_boolean arm_fix_adjustable (struct fix *);
 extern int arm_elf_section_type (const char *, size_t);
 extern int tc_arm_regname_to_dw2regnum (char *regname);
 extern void tc_arm_frame_initial_instructions (void);
+
+#ifdef TE_PE
+
+#define O_secrel O_md1
+
+#define TC_DWARF2_EMIT_OFFSET  tc_pe_dwarf2_emit_offset
+void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
+
+#endif /* TE_PE */
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 346dcef..92675883 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-08-05  Pedro Alves  <pedro_alves@portugalmail.pt>
+
+	* ld-pe/pe.exp: Enable tests on arm-wince-pe.
+	* ld-pe/secrel.d: Adjust test to work on arm-wince-pe too.
+
 2006-08-04  Richard Sandiford  <richard@codesourcery.com>
 
 	* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index ac38a70..bd25508 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -1,5 +1,5 @@
 # Expect script for export table in executables tests

-#   Copyright 2004

+#   Copyright 2004, 2006

 #   Free Software Foundation, Inc.

 #

 # This file is free software; you can redistribute it and/or modify

@@ -17,9 +17,9 @@
 # Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.

 #

  

-# This test can only be run on i386 PE/COFF platforms.

+# This test can only be run on PE/COFF platforms that support .secrel32.

 if { ![istarget i*86-*-cygwin*] && ![istarget i*86-*-pe]

-     && ![istarget i*86-*-mingw*] } {

+     && ![istarget i*86-*-mingw*] && ![istarget arm-wince-pe] } {

     return

 }

 

diff --git a/ld/testsuite/ld-pe/secrel.d b/ld/testsuite/ld-pe/secrel.d
index 93e083f..b924f54 100644
--- a/ld/testsuite/ld-pe/secrel.d
+++ b/ld/testsuite/ld-pe/secrel.d
@@ -1,27 +1,27 @@
 

-tmpdir/secrel\.x:     file format pei-i386

+tmpdir/secrel\.x: +file format pei-.*

 

 Contents of section \.text:

- 401000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

- 401010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

- 401020 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

- 401030 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

- 401040 ........ ........ ........ ........  ................

+ .*1000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

+ .*1010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

+ .*1020 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

+ .*1030 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

+ .*1040 ........ ........ ........ ........  ................

 Contents of section \.data:

- 402000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

- 402010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

- 402020 3e3e3e3e 04000000 110d0000 00111600  >>>>............

- 402030 0000111f 00000011 3c3c3c3c 3c3c3c3c  ........<<<<<<<<

- 402040 3e3e3e3e 04000000 110d0000 00111600  >>>>............

- 402050 0000111f 00000011 3c3c3c3c 3c3c3c3c  ........<<<<<<<<

- 402060 3e3e3e3e 04000000 110d0000 00111600  >>>>............

- 402070 0000111f 00000011 3c3c3c3c 3c3c3c3c  ........<<<<<<<<

- 402080 3e3e3e3e 24000000 112d0000 00113600  >>>>\$....-....6.

- 402090 0000113f 00000011 3c3c3c3c 3c3c3c3c  ...\?....<<<<<<<<

+ .*2000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

+ .*2010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

+ .*2020 3e3e3e3e 04000000 110d0000 00111600  >>>>............

+ .*2030 0000111f 00000011 3c3c3c3c 3c3c3c3c  ........<<<<<<<<

+ .*2040 3e3e3e3e 04000000 110d0000 00111600  >>>>............

+ .*2050 0000111f 00000011 3c3c3c3c 3c3c3c3c  ........<<<<<<<<

+ .*2060 3e3e3e3e 04000000 110d0000 00111600  >>>>............

+ .*2070 0000111f 00000011 3c3c3c3c 3c3c3c3c  ........<<<<<<<<

+ .*2080 3e3e3e3e 24000000 112d0000 00113600  >>>>\$....-....6.

+ .*2090 0000113f 00000011 3c3c3c3c 3c3c3c3c  ...\?....<<<<<<<<

 Contents of section \.rdata:

- 403000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

- 403010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

- 403020 3e3e3e3e 00000000 00000000 00000000  >>>>............

+ .*3000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  >>>><<<<>>>>><<<

+ .*3010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  >>>>>><<>>>>>>><

+ .*3020 3e3e3e3e 00000000 00000000 00000000  >>>>............

 Contents of section \.idata:

- 404000 00000000 00000000 00000000 00000000  ................

- 404010 00000000                             ....            

+ .*4000 00000000 00000000 00000000 00000000  ................

+ .*4010 00000000                             ....